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IEEE Transactions on Computers

Issue 5 • May 1990

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Displaying Results 1 - 17 of 17
  • A communicating finite automata approach to modeling distributed computation and its application to distributed decision-making

    Publication Year: 1990, Page(s):628 - 639
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1180 KB)

    A modeling technique for distributed computation based on a combination of directed graphs and finite automata is described. The paradigm of distributed decision-making (DDM) is used to illustrate the technique for its two primary purposes: providing a standard specification mechanism for different algorithms for solving the same problem and providing a common mechanism for objective quantitative ... View full abstract»

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  • Improvements to an algorithm for equipartitioning

    Publication Year: 1990, Page(s):706 - 710
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (528 KB)

    Modifications to a clustering algorithm in which objects are adaptively partitioned into clusters of equal size are described. The object migration automaton has the advantage of being conceptually simple and easy to implement. Unfortunately, the algorithm may exhibit slow convergence speed and in some cases may not converge at all. The algorithm is modified to provide remedies to these conditions... View full abstract»

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  • An approach to implementing multiplication with small tables

    Publication Year: 1990, Page(s):717 - 718
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    Table look-up is an attractive approach to implementing multiplication; however, the size of the requisite multiplication table is prohibitively large for wide operands. A novel transformation which reduces the number of table entries from 22b to 2b, where b is the width of the operands, is presented. Two implementation schemes are presented View full abstract»

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  • Performance evaluation of a dataflow architecture

    Publication Year: 1990, Page(s):615 - 627
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (904 KB)

    The formulation and validation of an analytical approach for the performance evaluation of the Manchester dataflow computer is discussed. The analytical approach is based on closed queuing network models. The average parallelism of the dataflow graph being executed on the dataflow architecture is shown to be related to the population of the closed network. The model of the dataflow computer is val... View full abstract»

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  • Cost reduction in the CCD realization of MVMT functions

    Publication Year: 1990, Page(s):702 - 706
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    The cost effectiveness of using an overflow circuit for truncated difference operation and a metal line for charge replication in the charge-coupled device (CCD) realization of multivalue multithreshold (MVMT) functions is considered. It is shown that the use of these two circuits leads to improved realizations compared to those achieved by previous approaches View full abstract»

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  • Sorting n objects with a k-sorter

    Publication Year: 1990, Page(s):714 - 716
    Cited by:  Papers (17)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    A k-sorter is a device that sorts k objects in unit time. The complexity of an algorithm that uses a k-sorter is defined as the number of applications of the k-sorter. In this measure, the complexity of sorting n objects is between n log n/k log k and 4n log n/k log k, up to first-o... View full abstract»

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  • Practical cellular dividers

    Publication Year: 1990, Page(s):605 - 614
    Cited by:  Papers (13)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (680 KB)

    A discussion is presented of parallel division algorithms that can be classified among modified higher radix nonrestoring online division methods, where redundant representations are extensively utilized to speed up the operation. The network realizations of these algorithms are cellular, or even systolic with exclusively local control; they have both size (area) and time of O(n)... View full abstract»

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  • Half-hot state assignments for finite state machines

    Publication Year: 1990, Page(s):700 - 702
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (260 KB)

    The state assignment problem for the programmable logic array (PLA) implementation of finite state machines is considered. It is pointed out that the number of PLA columns can be reduced by using state assignments leading to logic that is unate in the state variables. Half-hot state assignments are proposed, where each state has an encoding in which exactly half the state variables are equal to 1 View full abstract»

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  • Easily testable iterative logic arrays

    Publication Year: 1990, Page(s):640 - 652
    Cited by:  Papers (56)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1092 KB)

    Iterative logic arrays (ILAs) are studied with respect to two testing problems. First, a variety of conditions is presented. Meeting these conditions guarantees an upper bound on the size of the test set for the ILA under consideration. Second, techniques for designing optimally testable ILAs are presented. The arrays treated are, in some cases, more general than those that have been reported by o... View full abstract»

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  • Finding the optimal variable ordering for binary decision diagrams

    Publication Year: 1990, Page(s):710 - 713
    Cited by:  Papers (93)  |  Patents (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    The ordered binary decision diagram is a canonical representation for Boolean functions, presented by R.E. Bryant (1985) as a compact representation for a broad class of interesting functions derived from circuits. However, the size of the diagram is very sensitive to the choice of ordering on the variables; hence, for some applications, such as differential cascode voltage switch (DCVS) trees, it... View full abstract»

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  • A distributed commit protocol for a multicomputer system

    Publication Year: 1990, Page(s):718 - 724
    Cited by:  Papers (3)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (668 KB)

    A distributed commit protocol suitable for multicomputer systems is described. A general programming environment which provides transactions as a programming tool is discussed. This environment is expected to be more dynamic than a database management system; in particular, it is not known how many and which processes will participate in a specific transaction. Therefore, a model of completely dis... View full abstract»

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  • Analysis of self-stabilizing clock synchronization by means of stochastic Petri nets

    Publication Year: 1990, Page(s):597 - 604
    Cited by:  Papers (17)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (692 KB)

    A model for analyzing a FCS (fault-tolerant clock synchronization) system of the type supported by a statistical self-diagnosis is described. Once a self-diagnosis scheme is integrated into an FCS design, the problem of controlling and measuring the system's self-stability arises. A stochastic Petri net (SPN) model is constructed to derive the self-stability measures of such FCS systems. An exampl... View full abstract»

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  • Systolic evaluation of polynomial expressions

    Publication Year: 1990, Page(s):653 - 665
    Cited by:  Papers (5)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (696 KB)

    Two types of organizations are presented for frame buffers of m×m pixels: one is a single wavefront complex cell array requiring O(m2n) space and the other is a simple cell multiple wavefront array with O( m2) area and O(n2) wavefronts. Both these organizations have two main adva... View full abstract»

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  • Area-time optimal adder design

    Publication Year: 1990, Page(s):666 - 675
    Cited by:  Papers (43)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (656 KB)

    A systematic method of implementing a VLSI parallel adder is presented. A family of adders based on a modular design is defined. The design uses three types of component cells, which are implemented in static CMOS. The adder design is formulated as a dynamic programming problem, optimizing with respect to area and time. The result is an area-time optimal adder in the design family. The approach is... View full abstract»

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  • Optimal VLSI dictionary machines without compress instructions

    Publication Year: 1990, Page(s):676 - 693
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1648 KB)

    Several designs are presented for VLSI dictionary machines that combine both a linear (modify) network and a logarithmic (query) network with a novel idea for separation of concerns. The initial design objectives included: (1) single-cycle operability of host-issued modify and query commands (no compress instructions), (2) complete processor utilization (no waste processors), and (3) optimal 2 log... View full abstract»

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  • Unifying maximum cut and minimum cut of a planar graph

    Publication Year: 1990, Page(s):694 - 697
    Cited by:  Papers (15)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    The real-weight maximum cut of a planar graph is considered. Given an undirected planar graph with real-value weights associated with its edges, the problem is to find a partition of the vertices into two nonempty sets such that the sum of the weights of the edges connecting the two sets is maximum. The conventional maximum cut and minimum cut problems assume nonnegative edge weights, and thus are... View full abstract»

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  • Emulation of hypercube architecture on nearest-neighbor mesh-connected processing elements

    Publication Year: 1990, Page(s):698 - 700
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (256 KB)

    The problem of emulating a hypercube architecture on nearest-neighbor mesh (NNM) connected processing elements is addressed. The motivation for this study was the recent promotion of the transputer as a possibly very powerful building block of large highly parallel, scalable computer architectures. It is an attempt to achieve hypercubes of different dimensions with a constant, small number of link... View full abstract»

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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org