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Electron Devices, IEEE Transactions on

Issue 10 • Date Oct 2000

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Displaying Results 1 - 25 of 30
  • Theory of the Monte Carlo method for semiconductor device simulation

    Page(s): 1898 - 1908
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    A brief review of the semiclassical Monte Carlo (MC) method for semiconductor device simulation is given, covering the standard MC algorithms, variance reduction techniques, the self-consistent solution, and the physical semiconductor model. A link between physically based MC methods and the numerical method of MC integration is established. The integral representations the transient and the steady-state Boltzmann equations are presented as well as the corresponding conjugate equations. The structure of the iteration terms of the Neumann series and their evaluation by MC integration is discussed. Using this formal mathematical approach, the standard algorithms and variety of new algorithms are derived. The basic ideas of the weighted ensemble MC and the MC backward algorithms are explained View full abstract»

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  • Hybrid fullband cellular automaton/Monte Carlo approach for fast simulation of charge transport in semiconductors

    Page(s): 1909 - 1916
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    We present a fullband cellular automaton (CA) code for simulation of electron and hole transport in Si and GaAs. In this implementation, the entire Brillouin zone is discretized using a nonuniform mesh in k-space, and a transition table is generated between all initial and final states on the mesh, greatly simplifying the final state selection of the conventional Monte Carlo algorithm. This method allows for fully anisotropic scattering rates within the fullband scheme, at the cost of increased memory requirements for the transition table itself. Good agreement is obtained between the CA model and previously reported results for the velocity-field characteristics and high field distribution function, which illustrate the potential accuracy of the technique. A hybrid CA/Monte Carlo algorithm is introduced which helps alleviate the memory problems of the CA method while preserving the speed up and accuracy View full abstract»

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  • Efficient Monte Carlo device modeling

    Page(s): 1891 - 1897
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    A single-particle approach to full-band Monte Carlo device simulation is presented which allows an efficient computation of drain, substrate and gate currents in deep submicron MOSFETs. In this approach, phase-space elements are visited according to the distribution of real electrons. This scheme is well adapted to a test-function evaluation of the drain current, which emphasizes regions with large drift velocities (i.e., in the inversion channel), a substrate current evaluation via the impact ionization generation rate (i.e., in the LDD region with relatively high electron temperature and density) and a computation of the gate current in the dominant direct-tunneling regime caused by relatively cold electrons (i.e., directly under the gate at the source well of the inversion channel). Other important features are an efficient treatment of impurity scattering, a phase-space steplike propagation of the electron allowing to minimize self-scattering, just-before-scattering gathering of statistics, and the use of a frozen electric field obtained from a drift-diffusion simulation. As an example an 0.1-μm n-MOSFET is simulated where typically 30 minutes of CPU time are necessary per bias point for practically sufficient accuracy View full abstract»

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  • Simulation of semiconductor quantum well lasers

    Page(s): 1917 - 1925
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    A new quantum well laser simulator that accounts for details of carrier transport, distribution of two-dimensional (2-D) carriers within the quantum well, optical gain spectra, and photon rate equations, is presented. The resulting set of complicated equations is solved using “slack variables”-a new algorithm that is both efficient and stable. Results are compared with experiments to verify the simulator View full abstract»

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  • Circuit/device modeling at the quantum level

    Page(s): 1819 - 1825
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    Quantum mechanical (QM) effects, which manifest when the device dimensions are comparable to the de Broglie wavelength, are becoming common physical phenomena in the current micro-/nano-meter technology era. While most novel devices take advantage of QM effects to achieve fast switching speed, miniature size, and extremely small power consumption, the mainstream CMOS devices (with the exception of EEPROMs) are generally suffering in performance from these effects. Solutions to minimize the adverse effects caused by QM while keeping the downscaling trend (technology feasibility aside) are being sought in the research community and industry-wide. This paper presents a perspective view of modeling approaches to quantum mechanical effects in solid-state devices at the device and circuit simulation levels. Specifically, the macroscopic modeling of silicon devices to include QM corrections in the classical transport framework is discussed. Both device and circuit models will be provided. On the quantum devices, such as the single electron junctions and transistors, the emphasis is placed on the principle of logic circuit operation View full abstract»

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  • Ultrasmall MOSFETs: the importance of the full Coulomb interaction on device characteristics

    Page(s): 1831 - 1837
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    A novel scheme that accounts for the short-range Coulomb forces and prevents the double-counting of the long-range interaction is described in the context of three-dimensional (3-D) ensemble Monte Carlo particle-based simulations. It is shown that the inclusion of full Coulomb interactions strongly affects both the threshold voltage, the carrier dynamics and the resulting device characteristics. The proper treatment of the short-range Coulomb forces significantly reduces the distances over which thermalization of the carriers occurs in the drain region and leads to about a factor of two smaller on-state drain currents. The proposed scheme was successfully used to describe fluctuations in various device parameters due to the random dopant fluctuations. Correlation of device threshold voltage to the number of dopant atoms at a given depth showed that most dopant atoms have an impact on the threshold voltage, while only those in the top 8-10 nm affect the device velocity View full abstract»

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  • A multidimensional laser simulator for edge-emitters including quantum carrier capture

    Page(s): 1926 - 1934
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    A multidimensional semiconductor laser simulator is presented which follows a rate equation approach for the coupling between optics and electronics. Capture and emission rates for the bound and free carriers are used for the quantum well. The electronic equations and the optical equations are solved in a self-consistent manner for one, two, and three dimensions. As an example, an InGaAs quantum-well ridge laser is analyzed, and the multidimensional simulation approach for Fabry-Perot device structures is discussed. A three-dimensional (3-D) simulation of a device with a truncated contact shows the applicability of the simulator to complex laser cavity designs View full abstract»

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  • Large-scale atomistic modeling of nanoelectronic structures

    Page(s): 1804 - 1810
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    Large-scale molecular-dynamics simulations are performed on parallel computers to study critical issues on ultrathin dielectric films and device reliability in next-decade semiconductor devices. New interatomic-potential models based on many-body, reactive, and quantum-mechanical schemes are used to study various atomic-scale effects: growth of oxide layers; dielectric properties of high-permittivity oxides; dislocation activities at semiconductor/dielectric interfaces; effects of amorphous layers and pixellation on atomic-level stresses in lattice-mismatched nanopixels; and nanoindentation testing of thin films. Enabling technologies for 10 to 100 million-atom simulations of nanoelectronic structures are discussed, which include multiresolution algorithms for molecular dynamics, load balancing, and data management. In ten years, this scalable software infrastructure will enable trillion-atom simulations of realistic device structures with sizes well beyond μm on petaflop computers View full abstract»

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  • Modeling of direct tunneling current through gate dielectric stacks

    Page(s): 1851 - 1857
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    The direct tunneling current has been calculated for the first time from an inverted p-substrate through different gate dielectrics by numerically solving Schroedinger's equation and allowing for wavefunction penetration into the gate dielectric stack. The numerical solution adopts a first-order perturbation approach to calculate the lifetime of the quasi-bound states. This approach has been verified to be valid even for extremely thin dielectrics (0.5 nm). The tunneling currents predicted by this technique compare well with the WKB solution. Also for the first time investigation of the wavefunction penetration into gate stacks and their effects on quantization in the substrate has also been performed. For the same effective oxide thickness (EOT) the direct tunneling current decreases with increasing dielectric constant, as expected. However, in order to take full advantage of using high-K dielectrics as gate insulators the interfacial oxide needs to be eliminated View full abstract»

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  • Viscoelastic material behavior: models and discretization used in process simulator DIOS

    Page(s): 1999 - 2007
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    It is a known fact that melted glass, such as SiO2, shows viscoelastic behavior. But in the range of processing temperatures the mechanical properties of SiO2 vary strongly. While below 800°C the material behaves like an elastic solid, at temperatures above 1000°C it shows nearly pure viscous properties. In this paper, the governing equation, the so-called constitutive equation, describing viscoelastic behavior, and its discretization are presented. The oxide viscosity depends on the local amount of shear stresses which leads to inhomogeneous material behavior and a nonlinear theory. This new mechanical model was implemented into the process simulator DIOS-ISE. Some obtained simulation results are shown and discussed View full abstract»

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  • Single-electron device simulation

    Page(s): 1811 - 1818
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    A three-dimensional (3-D) simulator is presented which uses a linear-response approach to simulate the conductance of semiconductor single-electron transistors at the solid-state level. The many-particle groundstate of the quantum dot, weakly connected to the drain and the source reservoir, is evaluated in a self-consistent manner including quantum-mechanical many-body interactions. A transfer-Hamiltonian approach is used to compute the tunneling rates for the coupling of the quantum dot levels to the macroscopic reservoirs on the basis of realistic barrier potentials. The simulator was applied to a GaAs/AlGaAs example structure. We discuss the conductance characteristic and the capacitances as well as the microscopic structure of the quantum dot View full abstract»

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  • Challenges for atomic scale modeling in alternative gate stack engineering

    Page(s): 1787 - 1794
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    We review the challenges for atomic scale modeling of alternative gate dielectric stacks. We begin by highlighting recent achievements of state-of-the-art atomistic simulations of the Si-SiO2 system, showing how such calculations have elucidated the microscopic origins of several important experimental phenomena. For the benefit of readers who may be unfamiliar with the simulation tools, we overview and compare the relevant methods. We then describe the difficulties encountered in extending these approaches to investigate high-k dielectric stacks, pointing out exciting research directions aimed at overcoming these challenges. We conclude by presenting a roadmap of computational goals for atomic scale modeling of alternative gate dielectrics View full abstract»

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  • Application of silicon-based process simulation tools to the fabrication of heterojunction bipolar transistors

    Page(s): 1973 - 1979
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    Process simulation is not widely used to date in the compound semiconductor industry. This is due in part to several issues that exist in applying commercially available simulation tools that were designed for silicon integrated circuits (ICs), to the fabrication of III-V-based devices. These issues arise from the inherent differences in the fabrication techniques used in the separate device technologies. Computer simulations have been applied to model heterojunction bipolar transistor (HBT) fabrication at HRL Laboratories, LLC. These silicon-based simulations require calibration to accurately model the profiles produced during III-V device and IC fabrication. The calibration method includes the production of simulated cross sections, which are then compared with focused ion beam cross sections of actual devices View full abstract»

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  • Monte Carlo simulation of noncubic symmetry semiconducting materials and devices

    Page(s): 1882 - 1890
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    In this paper, we discuss the complexities that arise in Monte Carlo based modeling of noncubic symmetry semiconductors and their related devices. We have identified three general issues, band structure, scattering mechanisms, and band intersections that require some modification of the Monte Carlo simulator from that for cubic symmetry. Owing to the increased size and number of atoms per unit cell, the band structure is far more complex in noncubic than in zincblende phase semiconductors. This added complexity is reflected by the greater number of bands, smaller Brillouin zone and concomitant increase in the number of band intersections. We present strategies for modeling the effects of band intersections on the carrier dynamics using the Monte Carlo method. It is found that the band intersection points greatly affect the carrier transport, most dramatically in the determination of the impact ionization and breakdown properties of devices and bulk material. Excellent agreement with experimental measurements of the impact ionization coefficients is obtained only when treatment of the band intersections is included within the model View full abstract»

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  • A percolative approach to reliability of thin films

    Page(s): 1986 - 1991
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    Degradation of thin films is studied within a stochastic approach based on a percolative technique. The thin film is modeled as a two-dimensional (2-D) random resistor network in thermal contact with a substrate. Its microscopic degradation is characterized by a breaking probability of the single resistor. A recovery of the damage is also allowed. The degradation and failure of metallic interconnects and dielectric insulators are then described as a conductor-insulator (CI) and an insulator-conductor (IC) transition, respectively. The recovery of the damage competing with the degradation can also lead to a steady-state condition. The main features of experiments are reproduced together with their statistical properties. Our approach thus provides a unified description of degradation and failure processes in terms of physical parameters View full abstract»

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  • Separation of effects of statistical impurity number fluctuations and position distribution on Vth fluctuations in scaled MOSFETs

    Page(s): 1838 - 1842
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    We have investigated the effect of the statistical “position” distribution of dopant atoms on threshold voltage (Vth) fluctuations in scaled MOSFETs. The effects of impurity “number” fluctuations and impurity “position” distribution are successfully separated in two-dimensional simulation for fully-depleted (FD) SOI MOSFETs. It is found that the contribution by the position distribution is closely related to the charge sharing factor (CSF) and the effect of the impurity position distribution becomes dominant as CSF is degraded. Consequently, the contribution ratio of the impurity position distribution is kept almost constant when the device is properly scaled View full abstract»

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  • Monte Carlo simulation of the CHISEL flash memory cell

    Page(s): 1873 - 1881
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    This work shows how physically-based hot carrier simulation was used to understand the importance of CHannel Initiated Secondary ELectron (CHISEL) injection in scaled MOSFETs, and how it was used to develop a powerful CHISEL-based technique for low voltage flash programming. Furthermore, it is shown how CHISEL flash addresses many of the disadvantages of CHE programming techniques, making it an ideal candidate for low-voltage, low-power Gigabit flash memories View full abstract»

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  • Monte Carlo simulator for the design optimization of low-noise HEMTs

    Page(s): 1950 - 1956
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    A complete analysis of low-noise 0.1 μm gate AlInAs-GaInAs HEMT's has been performed by using a semiclassical Monte Carlo simulation. The validity of the model has been checked through the comparison of the simulated results with static, dynamic and noise experimental measurements of real HEMTs. In order to reproduce the experimental results, we have included in the model some important real effects such as degeneracy, surface charges, T-shape of the gate, presence of dielectrics and contact resistances. Moreover, the extrinsic parameters of the devices have been added to the usual intrinsic small-signal equivalent circuit, thus allowing the calculation of the real noise of the HEMTs (characterized using the extrinsic minimum noise figure). In this way, we make possible not only the comparison with the experimental noise results, but also the analysis of the influence of the parasitic elements, the device width or the number of gate fingers on the noise of the HEMTs. The reliability of the simulator allows us to realize “computer experiments” which will make faster and cheaper the optimization process of the device design View full abstract»

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  • Langevin forces and generalized transfer fields for noise modeling in deep submicron devices

    Page(s): 1992 - 1998
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    We show that the standard impedance field method that considers as noise source the spectral density of velocity fluctuations is not appropriate for the calculation of noise spectra in deep submicron devices where spatial correlations between velocity fluctuations cannot be neglected. To overcome this drawback, we develop a new scheme in which the noise sources are given by the instantaneous accelerations of relevant dynamic variables caused by scattering events. Accordingly, generalized transfer fields describing the propagation of fluctuations to the device terminals are introduced. By using this scheme, we show that, in contrast with the standard impedance field method, noise modeling in submicron structures can be performed with no major difficulty and the dual representation of voltage and current noise is recovered View full abstract»

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  • Memory cell simulation on the nanometer scale

    Page(s): 1826 - 1830
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    We describe a toolset of simulation programs and its use for the simulation of a memory cell based on Coulomb blockade. We present simulation results both for the main parameters of the memory cell and the influence of parasitic effects. We point out that both setting up specific programs and providing data exchange between them is necessary in order to describe the memory cell to a realistic extent View full abstract»

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  • Gate length scaling for Al0.2Ga0.8N/GaN HJFETs: two-dimensional full band Monte Carlo simulation including polarization effect

    Page(s): 1965 - 1972
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    Two-dimensional self-consistent full band Monte Carlo (FBMC) simulator was developed for electron transport in wurtzite phase AlGaN/GaN heterojunction (HJ) FET. Recessed gate Al0.2Ga0.8N/GaN HJFET structures with an undoped cap layer were simulated, where the spontaneous and piezoelectric polarization effects were taken into account. The polarization effect was shown to not only increase the current density, but also improve the carrier confinement, and hence improve the transconductance. An off-state drain breakdown voltage (BVds) of 300 V and a maximum linear output power (Pmax) of 46 W/mm were predicted for a 0.9-μm gate device. For a 0.1-μm gate device, 60 V BVds , 20 W/mm Pmax, and 160 GHz current-gain cutoff frequency were predicted. Although there is considerable uncertainty due to lack of information on the band structure, scattering rates, and surface conditions, the present results indicate a wide margin for improvements over current performance of AlGaN/GaN HJFETs in the future. To our knowledge, this is the first report on the FBMC simulation for AlGaN/GaN HJFETs View full abstract»

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  • Band-structure calculations of SiO2 by means of Hartree-Fock and density-functional techniques

    Page(s): 1795 - 1803
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    Ab initio calculations of the full-band structure of SiO2 are worked out. Both the conduction and valence bands are investigated by means of two different techniques: Hartree-Fock (HF) and density-functional theory (DFT). A number of energy-level diagrams are calculated in order to compare the corresponding density of states in a range of about 10 eV. Different crystal structures of SiO2 are studied, that are known to be built-up by the same fundamental unit, namely, the SiO4 tetrahedron. All the analyzed systems are polymorphs of silica; specifically, the α- and β-quartz, the α- and β-cristobalite, and the β-tridymite View full abstract»

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  • Microscopic theory of hydrogen in silicon devices

    Page(s): 1779 - 1786
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    Incorporation of hydrogen has a strong effect on the characteristics of silicon devices. A fundamental understanding of the microscopic mechanisms is required in order to monitor and control the behavior of hydrogen. First-principles calculations have been instrumental in providing such understanding. We first outline the basic principles that govern the interaction between hydrogen and silicon, followed by an overview of recent first-principles results for hydrogen interactions with silicon. We show that H2 molecules are far less inert than previously assumed. We then discuss results for motion of hydrogen through the material, as relating to diffusion and defect formation. We also discuss the enhanced stability of Si-D compared to Si-H bonds, which may provide a means of suppressing defect generation. We present a microscopic mechanism for hydrogen-hydrogen exchange, and examine the metastable ≡SiH2 complex formed during the exchange process. Throughout, we highlight issues relevant for hydrogen in amorphous silicon (used in solar cells, sensors and displays) and in Si-SiO2 structures (used in integrated circuits). The broader impact of first-principles calculations on computational electronics will also be discussed View full abstract»

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  • 120 V interdigitated-drain LDMOS (IDLDMOS) on SOI substrate breaking power LDMOS limit

    Page(s): 1980 - 1985
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    A new device structure named IDLDMOS is proposed to overcome the power LDMOS limit (Ron, sp ∝ BVdss2.5 ). The concept is based on replacing LDMOS lightly doped n-drift region by moderately doped alternating p and n layers of suitable dimension and doping. Off state requirement is achieved by mutual lateral-depletion of the alternating layers. Using small identical lateral width for both p and n layers, a doping concentration of up to two orders of magnitude higher than n-drift concentration in a conventional case can he achieved to reduce the on-resistance Ron . The simulated 120 V IDLDMOS on SOI substrate has shown a Ron value that is about 38% of the corresponding Ron value of a conventional n- LDD type LDMOS. At a Ron, sp value of 1.15 mΩ-cm2 with BVdss of 124 V, IDLDMOS has exceeded the conventional LDMOS limit. Compared to conventional LDMOS, IDLDMOS is less prone to quasisaturation at high gate and drain voltage due to its higher drain doping. Isothermal simulation has shown that there was no deterioration in both AC and transient performance between the two devices. Nevertheless, the lower Vd, sat of LDLDMOS is expected to yield a higher gm at the same level of current conduction as in the conventional structure View full abstract»

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  • Ensemble Monte Carlo study of channel quantization in a 25-nm n-MOSFET

    Page(s): 1864 - 1872
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    We develop a self-consistent, ensemble Monte Carlo device simulator that is capable of modeling channel carrier quantization and polysilicon gate depletion in nanometer-scale n-MOSFETs. A key feature is a unique bandstructure expression for quantized electrons. Carrier quantization and polysilicon depletion are examined against experimental capacitance-voltage (C-V) data. Calculated drain current values are also compared with measured current-voltage data for an n-MOSFET with an effective channel length (Leff) of 90 nm. Finally, the full capabilities of the Monte Carlo simulator are used to investigate the effects of carrier confinement in a Leff=25 nm n-MOSFET. In particular, the mechanisms affecting the subband populations of quantized electrons in the highly nonuniform channel region are investigated. Simulation results indicate that the occupation levels in the subbands are a strong function of the internal electric field configurations and two-dimensional (2-D) carrier scattering View full abstract»

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IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

 

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Editor-in-Chief
John D. Cressler
School of Electrical and Computer Engineering
Georgia Institute of Technology