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Circuits, Devices and Systems, IEE Proceedings -

Issue 3 • Date Jun 2000

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Displaying Results 1 - 8 of 8
  • Implementation of PCI-based systems using programmable logic

    Publication Year: 2000 , Page(s): 171 - 174
    Cited by:  Patents (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (272 KB)  

    Designing a PCI target or master interface using a CPLD or an FPGA requires special attention to the architectural details of the chip used. The paper considers typical CPLD and FPGA architectural features relevant to implementations of PCI interfaces. Different methods of implementing certain aspects of PCI interfaces using a minimal amount of chip resources, while staying compliant with the PCI ... View full abstract»

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  • Simplified and accurate power-analysis method for deep-submicron ASIC designs

    Publication Year: 2000 , Page(s): 175 - 182
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (388 KB)  

    The algorithm, called Simplified Power Equations (SPE), derived on the basis of a host of transistor level power analyses of standard cells, properly represents the dependency of average power dissipation on output load, input slope and input state. Using the algorithm, power models of standard cells are significantly simplified while preserving a high level of accuracy. The efficiency of a gate-l... View full abstract»

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  • Three types of 2-D lateral magnetoresistive sensors with p+ -implant confinement

    Publication Year: 2000 , Page(s): 158 - 164
    Cited by:  Patents (2)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (500 KB)  

    The paper presents three types of 2-D magnetic sensors fabricated by an industrial 0.8 μm CMOS process. They are designed to measure the horizontal magnetic component Bx and the vertical magnetic component By, simultaneously. The devices with p+-implant confinement have been investigated experimentally. According to experimental results, the magnitudes of the cr... View full abstract»

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  • Approach to the design of low-voltage SC filters

    Publication Year: 2000 , Page(s): 196 - 200
    Cited by:  Papers (4)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (308 KB)  

    A design approach for low-voltage SC filters to be implemented in standard CMOS processes is presented. It is based on simple building blocks which are a clock booster and an SC integrator which uses a single-input amplifier instead of the traditional differential-input amplifier. To validate the proposed approach, a fourth-order elliptic SC low-pass filter was designed using a 1.2 μm CMOS proc... View full abstract»

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  • Compact 32-bit CMOS adder in multiple-output DCVS logic for self-timed circuits

    Publication Year: 2000 , Page(s): 183 - 188
    Cited by:  Papers (5)  |  Patents (7)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (320 KB)  

    The paper presents a compact 32-bit carry look-ahead (CLA) adder in multiple-output differential-cascode voltage-switch (MODCVS) logic for delay-insensitive self-timed applications. This adder is structurally and functionally equivalent to a dynamic Manchester carry chain with an efficient organisation which exploits the advantages of MODCVS logic to reduce both the number of devices required and ... View full abstract»

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  • Introduction to distributed mode loudspeakers (DML) with first-order behavioural modelling

    Publication Year: 2000 , Page(s): 153 - 157
    Cited by:  Papers (1)  |  Patents (2)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (280 KB)  

    A simple equivalent circuit of a distributed mode loudspeaker (DML) is described, which is accessible to engineers not specialised in acoustics. The DML is an acoustic radiator, the electrical, mechanical and acoustical properties of which differ radically from conventional moving coil transducers. DML radiation results from uniformly distributed, free vibration in a stiff light panel and not pist... View full abstract»

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  • Selectivity of elliptic filters

    Publication Year: 2000 , Page(s): 189 - 195
    Cited by:  Papers (3)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (392 KB)  

    The problem of determining the band-edge selectivity of elliptic filters is addressed. First, the band-edge selectivity is derived with respect to the nth order elliptic function. The sensitivity of the selectivity to the various design parameters such as passband and stopband requirements is studied next. The maximisation of the band-edge selectivity of elliptic filters without increasing their o... View full abstract»

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  • Impact ionisation in GaAs planar-doped barrier structures grown by molecular layer epitaxy

    Publication Year: 2000 , Page(s): 165 - 170
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (332 KB)  

    The I-V characteristics and substrate current of GaAs planar-doped barrier (PDB) n+-i-p+-i-n+ structures with various barrier heights (0.5-0.8 V) grown by molecular layer epitaxy (MLE) have been measured at temperatures ranging from 77 to 296 K. The measurement was carried out at the constant source-drain distance of 1000 Å. It is found that an abrupt increas... View full abstract»

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