Electron Devices, IEEE Transactions on
Issue 4 • Date April 2000
Society Sponsor
Filter Results
Displaying Results 1 - 25 of 38
-
Comments on "A numerical analysis of the storage times of dynamic random-access memory cells incorporating ultrathin dielectrics"
|
PDF (90 KB)
-
Characterization of shallow silicided junctions for sub-quarter micron ULSI technology. Extraction of silicidation induced Schottky contact area
|
PDF (200 KB)
-
-
A physical thermal noise model for SOI MOSFET
|
PDF (144 KB)
-
Surface geometric effects on tunneling rates
|
PDF (172 KB)
-
Explaining the dependences of the hole and electron mobilities in Si inversion layers
|
PDF (172 KB)
-
Design optimization of high-performance low-temperature 0.18 μm MOSFETs with low-impurity-density channels at supply voltage below 1 V
|
PDF (248 KB)
-
Temperature dependent minority electron mobilities in strained Si 1-xGex (0.2⩽x⩽0.4) layers
|
PDF (224 KB)
-
-
-
New channel engineering for sub-100 nm MOS devices considering both carrier velocity overshoot and statistical performance fluctuations
|
PDF (216 KB)
-
Theoretical study of deep-trap-assisted anomalous currents in worst-bit cells of dynamic random-access memories (DRAM's)
|
PDF (176 KB)
-
Tunnel magnetoresistance devices processed by oxidation in air and UV assisted oxidation in oxygen
|
PDF (132 KB)
-
-
High temperature performance of NMOS integrated inverters and ring oscillators in 6H-SiC
|
PDF (112 KB)
-
Isolation edge effect depending on gate length of MOSFETs with various isolation structures
|
PDF (280 KB)
-
A closed-form back-gate-bias related inverse narrow-channel effect model for deep-submicron VLSI CMOS devices using shallow trench isolation
|
PDF (352 KB)
-
Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of Leff and Rsd of LDD MOSFETs
|
PDF (104 KB)
-
Dielectric breakdown mechanism of thin-SiO2 studied by the post-breakdown resistance statistics
|
PDF (116 KB)
-
-
Polysilicon gate enhancement of the random dopant induced threshold voltage fluctuations in sub-100 nm MOSFETs with ultrathin gate oxide
|
PDF (256 KB)
-
Device scaling effects on hot-carrier induced interface and oxide-trapped charge distributions in MOSFETs
|
PDF (244 KB)
-
Universal impurity ionization parameters in MIS C-V freeze-out characteristics and direct extraction of surface doping concentration
|
PDF (232 KB)
-
-
Aims & Scope
IEEE Transactions on Electron Devices comprises original and significant contributions relating to the theory, design, performance and reliability of electron devices, including optoelectronic devices, nanoscale devices, solid-state devices, integrated electronic devices, energy sources, power devices, displays, sensors, electro-mechanical devices, quantum devices and electron tubes.
Meet Our Editors
Editor-in-Chief
John D. Cressler
School of Electrical and Computer Engineering
Georgia Institute of Technology
