Issue 2 • Date Feb. 2000
Filter Results
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Editorial
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PDF (20 KB)
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Timing optimization on routed designs with incremental placement and routing characterization
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PDF (192 KB)
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Interconnect thermal modeling for accurate simulation of circuit timing and reliability
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PDF (264 KB)
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Optimal phase conflict removal for layout of dark field alternating phase shifting masks
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PDF (324 KB)
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Timing-driven maze routing
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PDF (184 KB)
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Slicing floorplans with range constraint
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PDF (268 KB)
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Simultaneous gate sizing and placement
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PDF (232 KB)
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Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


