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IEEE Transactions on Computers

Issue 12 • Date Dec. 1999

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Displaying Results 1 - 10 of 10
  • Author index

    Publication Year: 1999, Page(s):1380 - 1384
    Request permission for commercial reuse | PDF file iconPDF (120 KB)
    Freely Available from IEEE
  • Subject index

    Publication Year: 1999, Page(s):1384 - 1392
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    Freely Available from IEEE
  • Two operand binary adders with threshold logic

    Publication Year: 1999, Page(s):1324 - 1337
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (964 KB)

    The central topic of this paper is the implementation of binary adders with threshold logic using a new methodology that introduces two innovations: the use of the input and output carries of each bit for obtaining all the sum bits and a modification of the classic carry lookahead adder technique that allows us to obtain the expressions of the generation and propagation carries in a more appropria... View full abstract»

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  • Diagnosability of hypercubes and enhanced hypercubes under the comparison diagnosis model

    Publication Year: 1999, Page(s):1369 - 1374
    Cited by:  Papers (49)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    A. Sengupta and A. Dahbura (1992) discussed how to characterize a diagnosable system under the comparison diagnosis model proposed by J. Maeng and M. Malek (1981) and a polynomial algorithm was given to identify the faulty processors provided that the system's diagnosability is known. However, for a general system, the determination of its diagnosability is not algorithmically easy. This paper pro... View full abstract»

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  • Distributed generation of weighted random patterns

    Publication Year: 1999, Page(s):1364 - 1368
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (136 KB)

    This paper describes the design details, operation, cost, and performance of a distributed weighted pattern test approach at the chip level. The traditional LSSD SRLs are being replaced by WRP SRLs designed specifically to facilitate a weighted random pattern (WRP) test. A two-bit code is transmitted to each WRP SRL to determine its specific weight. The WRP test is then divided into groups, where ... View full abstract»

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  • Statistical prediction of task execution times through analytic benchmarking for scheduling in a heterogeneous environment

    Publication Year: 1999, Page(s):1374 - 1379
    Cited by:  Papers (56)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (276 KB)

    In this paper, a method for estimating task execution times is presented in order to facilitate dynamic scheduling in a heterogeneous metacomputing environment. Execution time is treated as a random variable and is statistically estimated from past observations. This method predicts the execution time as a function of several parameters of the input data and does not require any direct information... View full abstract»

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  • A performance model for Duato's fully adaptive routing algorithm in k-ary n-cubes

    Publication Year: 1999, Page(s):1297 - 1304
    Cited by:  Papers (57)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    Analytical models of deterministic routing in wormhole-routed k-ary n-cubes have widely been reported in the literature. Although many fully adaptive routing algorithms have been proposed to overcome the performance limitations of deterministic routing, there have been hardly any studies that describe analytical models for these algorithms. This paper proposes a new analytical model for obtaining ... View full abstract»

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  • Synthesis for testability of highly complex controllers by functional redundancy removal

    Publication Year: 1999, Page(s):1305 - 1323
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1432 KB)

    This paper presents a testable synthesis methodology applicable to any top-down design method based on hardware-description-language descriptions, or graphical representations. The methodology is targeted on control-dominated applications and it is based on the identification and removal of a new class of redundant faults, called functionally redundant faults. The formal relation between functiona... View full abstract»

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  • Distributed path reservation algorithms for multiplexed all-optical interconnection networks

    Publication Year: 1999, Page(s):1355 - 1363
    Cited by:  Papers (20)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    In this paper, we study distributed path reservation protocols for multiplexed all-optical interconnection networks. The path reservation protocols negotiate the reservation and establishment of connections that arrive dynamically to the network. These protocols can be applied to both wavelength division multiplexing (WDM) and time division multiplexing (TDM) networks. Two classes of protocols are... View full abstract»

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  • Run-time cache bypassing

    Publication Year: 1999, Page(s):1338 - 1354
    Cited by:  Papers (27)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1208 KB)

    The growing disparity between processor and memory performance has made cache misses increasingly expensive. Additionally, data and instruction caches are not always used efficiently, resulting in large numbers of cache misses. Therefore, the importance of cache performance improvements at each level of the memory hierarchy will continue to grow. In numeric programs, there are several known compil... View full abstract»

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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org