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Computers and Digital Techniques, IEE Proceedings -

Issue 5 • Date Sep 1999

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Displaying Results 1 - 8 of 8
  • Scheduling schemes for data farming

    Page(s): 227 - 234
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (704 KB)  

    The use of order statistics to arrive at a scheduling regime is shown to be applicable to data farms running on second-generation parallel processors. Uniform and decreasing task-size scheduling regimes are examined. Experimental timings and a further simulation for large-scale effects were used to exercise the scheduling regimes. The paper also considers a number of other scheduling schemes for data farms. It is shown that a method previously used for loop scheduling is preferable, particularly as a form of automatic and generalised scheduling for data farming where there is a data-dependent workload View full abstract»

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  • Exact AEP model in signature analysis using LCM

    Page(s): 247 - 252
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (432 KB)  

    Linear compacting modules (LCMs) cover a wide range of compacting machines, of which linear feedback shift registers (LFSRs) and linear cellular automata (LCA) are two examples. An exact analytical model for aliasing error probability (AEP) in signature analysis using LCMs is derived. The model quantitatively specifies the effects of the LCM architecture, including the number of stages, the LCM interconnection, of the test pattern length and the binary stream error statistics. We show that the bit selection criterion used for calculation of the AEP of the external- and internal-Exclusive-Or (XOR) LFSRs is not valid in less specific cases. Hence, the authors introduce a new criterion for the bit selection for the general case. The use of a general LCM simplifies the design and implementation of the Application Specific ICs (ASICs) by providing a flexible (and uniform) structure that can be easily integrated with neighboring structures. This could result in hardware savings exceeding 66% View full abstract»

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  • Cryptographic key assignment scheme for dynamic access control in a user hierarchy

    Page(s): 235 - 240
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (532 KB)  

    The authors present a cryptographic key assignment scheme based on both the Rabin public key system and the Chinese remainder theorem, in order to solve dynamic access control problems in user hierarchies. Compared to earlier assignment schemes, the new scheme ensures that a security class can efficiently derive secret keys of its successors. Dynamic access control problems, such as adding/deleting classes, adding/deleting relationships, and changing secret keys, are considered. Moreover, without altering other keys present in the system, each user in the hierarchy can freely change his own key View full abstract»

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  • Threshold proxy signatures

    Page(s): 259 - 263
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (456 KB)  

    A (t, n) threshold proxy signature scheme allows t or more proxy signers from a designated group of n proxy signers to sign messages on behalf of an original signer. The authors review both Zhang's threshold proxy signature scheme and Kim's threshold proxy signature scheme. They show that Zhang's scheme suffers from some weaknesses and Kim's scheme suffers from a disadvantage. Based on Zhang's scheme, they propose a new threshold proxy signature scheme to defeat the weaknesses of Zhang's scheme and the disadvantage of Kim's scheme View full abstract»

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  • Application of symbolic FSM Markovian analysis to protocol verification

    Page(s): 221 - 226
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (552 KB)  

    Computer-aided design tools for Markovian analysis and verification of digital circuits have gained much interest in the last few years. This is mainly due to the advent of effective data structures, e.g., binary and algebraic decision diagrams, for Boolean and pseudo-Boolean function representation and manipulation. The authors illustrate how those tools can be successfully exploited to analyse the behavior and verify the correctness of a communication protocol. They first consider the case of single protocol entities running in isolation, and present a simple application example (i.e. the sender entity of the alternating bit protocol). Then, informally illustrate how the analysis approach can be extended to the general case of multi-layer protocol stacks and complete communication systems View full abstract»

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  • Instruction cache prefetching directed by branch prediction

    Page(s): 241 - 246
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (604 KB)  

    As the gap between processor speed and memory speed grows, so the performance penalty of instruction cache misses gets higher. Instruction cache prefetching is a technique to reduce this penalty. The prefetching methods determine the target line to be prefetched generally based on the current fetched line address. However, as the cache line becomes wider, it may contain multiple branches. This is a hurdle which must be overcome. The authors have developed a new instruction cache prefetching method in which the prefetch is directed by the prediction on branches, called branch instruction based (BIB) prefetching; in which the prefetch information is recorded in an extended BTB. Simulation results show that for commercial benchmarks, BIB prefetching outperforms traditional sequential prefetching by 7% and other prediction table based prefetching methods by 17% on average. As BTB designs become more sophisticated and achieve higher hit and accuracy ratios, BIB pre-fetching can achieve a higher level of performance View full abstract»

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  • (t,n) threshold verifiable multisecret sharing scheme based on factorisation intractability and discrete logarithm modulo a composite problems

    Page(s): 264 - 268
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    A new (t, n) threshold verifiable multisecret sharing ((t, n) VMSS) scheme, based on the intractability of the factorisation and the discrete logarithm modulo a large composite problems, is proposed in which the dealer can freely give any set of multiple secrets for sharing, and the shadow held by the participant is not only reusable but also verifiable. The proposed scheme provides efficient solutions against cheating by either the dealer or a participant, and outperforms (t, n) VMSS schemes against cheating by participants devised by Ham and Chen et al View full abstract»

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  • Study of an efficient simulation method

    Page(s): 253 - 258
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (428 KB)  

    Trace-driven simulation has been widely used to evaluate the performance of cache memory. Prior to this investigation, a number of research projects were proposed for reducing the long execution time of trace-driven simulation. In the paper, a one-pass algorithm, called the flash-PM algorithm, is proposed which is both simple and efficient. The Hash-PM algorithm facilitates simulation by reducing the average search depth and using the right-match comparison. Since the Hash-PM algorithm can be adapted to simulation of direct-mapped, set-associative and fully-associative caches simultaneously, it is compared to the all-associativity algorithm proposed by Hill and Smith. For instruction traces, the results indicated that the present algorithm is not making great progress because of the preferable locality. For data traces, however, the results showed that the Hash-PM algorithm is much faster than the all-associativity algorithm. Implications of the results are discussed in detail View full abstract»

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