By Topic

IEE Proceedings - Circuits, Devices and Systems

Issue 5 • Date Oct 1999

Filter Results

Displaying Results 1 - 11 of 11
  • Novel Ge-profile design for high-speed SiGe HBTs: modelling and analysis

    Publication Year: 1999, Page(s):291 - 296
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (324 KB)

    The authors investigate the optimisation of the Ge profile in SiGe HBTs, with the aim of enhancing current gain without degrading the base transit time at different ambient temperatures and points of film stability. Using a new box-triangular Ge profile, they show that a current gain enhancement of ~3 is achievable at T=300 K for ytot =14% Ge without degrading the base transit time corr... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Comparative study of balance equation models

    Publication Year: 1999, Page(s):285 - 290
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (316 KB)

    A comparative study of several balance equation models which have been used for the analysis of semiconductor devices was carried out. Simulation results from a simplified one-valley model, an energy transport model and a drift-diffusion model applied to an AlGaAs HBT are compared with those from a fully specified two-valley model. Based on the study, some features of each model are clarified View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Altering transistor positions: impact on the performance and power dissipation of dynamic latches and flip-flops

    Publication Year: 1999, Page(s):279 - 284
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (352 KB)

    Floating nodes is a point of concern in dynamic latches and flip-flops. When floating these nodes are extremely susceptible to noise: their voltage level may get distorted owing to charge coupling with other nodes. The current approach to this problem is to convert these dynamic circuits into semistatic/static ones by using feedback transistors. Increased robustness in semistatic circuits comes at... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • VLSI design for high-speed LZ-based data compression

    Publication Year: 1999, Page(s):268 - 278
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (556 KB)

    A simple real-time parallel architecture for a CMOS VLSI implementation of a Ziv-Lempel data compression system is presented. This encoding system employs a linear systolic array to find concurrently the matches between each input data character and its corresponding dictionary, and can easily achieve an ideal compression ratio by cascading the chips of the encoding cell. A new encoding architectu... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Two-ring systolic array network for artificial neural networks

    Publication Year: 1999, Page(s):225 - 230
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (324 KB)

    The paper describes an efficient and fast systolic architecture for the implementation of artificial neural networks. The proposed architecture, TORAN (two-in-one ring array network), combines two-ring systolic array networks to perform two sets of weight-data pair multiplication operations in parallel. This increases the hardware by 40% but reduces by 50% the number of cycles to perform the weigh... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Dual nullator-norator networks

    Publication Year: 1999, Page(s):231 - 234
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (272 KB)

    It is proved rigorously that the dual of a uniquely solvable planar network composed of a finite number of two-terminal elements such as nonzero linear impedances, independent voltage and current sources, and equal numbers of nullators and norators is also uniquely solvable. In particular, this enriches the class of nonlinear resistive circuit structures possessing a unique solution. A dual versio... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Efficient SI wave elliptic filters based on direct and inverse Bruton transformations

    Publication Year: 1999, Page(s):235 - 241
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (400 KB)

    The paper describes an efficient method for designing switched-current elliptic-wave filters. The method is based on applying direct or inverse Bruton circuit transformation to an LC reference prototype prior to obtaining the equivalent wave filter. The method provides significant reduction in the switched-current circuit complexity, particularly for high-order filters, when compared with previous... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Transconductance feedback amplifier configuration exhibiting bandwidth-independent voltage gain

    Publication Year: 1999, Page(s):242 - 248
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (504 KB)

    Gain-bandwidth independence is potentially available in all dominant-pole single-loop feedback amplifier configurations except those in which the forward gain element type is identical to the overall amplifier configuration. In particular, feedback derived from a potential divider around a transconductance amplifier generates bandwidth-independent voltage gain along with optimum input loading cond... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Low-voltage fully differential switched-opamp bandpass ΣΔ modulator

    Publication Year: 1999, Page(s):249 - 253
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (332 KB)

    The paper deals with the design of a low-voltage bandpass ΣΔ modulator implemented with the switched-capacitor technique. To use standard technology (no low-threshold devices) and without an on-chip voltage multiplier, the switched-opamp technique has been adopted. The basic building blocks for the construction of a ΣΔ modulator (SC integrator, quantiser, and feedback DAC) ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Analysis and control of a cross-regulated multi-output forward quasi-resonant converter

    Publication Year: 1999, Page(s):255 - 262
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (452 KB)

    Steady-state and small-signal analysis of a dual-output forward zero-current quasi-resonant converter are presented. Steady-state analysis of the circuit is used to design the resonant tanks, the output filters and the transformer; small-signal analysis is used to design the control circuit for this converter. Simulation and experimental results are presented to illustrate the merits of these prop... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Low power, low noise micropipelined flash A-D converter

    Publication Year: 1999, Page(s):263 - 267
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (292 KB)

    Metastability in the comparators of high speed synchronous flash A-D converters is a source of noise in the output. Pipelining can reduce metastability errors but can consume significant power in synchronous systems, and techniques have been described which aim to reduce the power, but can lead to nonlinearity. It is shown that power can also be reduced without loss of linearity by asynchronous mi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.