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Semiconductor Manufacturing, IEEE Transactions on

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Semiconductor Manufacturing, IEEE Transactions on

Issue 4 • Date Nov. 1999

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Use of voltage stressing at wafer probe for reliability predictions

Enhancement or reduction of catalytic dissolution reaction in chemically amplified resists by substrate contaminants

Parameter sensitivity of covariance-based response surfaces for modeling IC processes

An investigation of the effects of iron in p⁺n silicon diodes for simulated plasma source ion implantation studies

Scheduling semiconductor device test operations on multihead testers

Feedforward control for reduced run-to-run variation in microelectronics manufacturing

Direct sampling methodology for statistical analysis of scaled CMOS technologies

Statistical device models from worst case files and electrical test data

A statistical analysis of single and multiple response surface modeling

The effect of deterministic spatial variations in retrograde well implants on shallow trench isolation for sub-0.18 μm CMOS technology

Intelligent control of via formation by photosensitive BCB for MCM-L/D applications

A new defect distribution metrology with a consistent discrete exponential formula and its applications

Intra-field effects on device and circuit manufacturability: a statistical simulation approach

Constraint transformation for IC physical design

Modeling manufacturing yield and reliability

Impact of unrealistic worst case modeling on the performance of VLSI circuits in deep submicron CMOS technologies

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