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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Issue 10 • Date Oct 1999

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Displaying Results 1 - 7 of 7
  • Behavioral models for noise in bipolar and MOSFET mixers

    Page(s): 1289 - 1300
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (352 KB)  

    Frequency-domain behavioral models for noise in both bipolar and MOSFET mixers are presented. These models are developed from a linear time-varying analysis for mixer noise. No simulations are required as in the conventional approach, hence these models are very efficient. Good agreement is obtained between the behavioral models and the results from the simulation based approaches over a range of frequencies and processes. The limitations of the models have been identified and some improvements are suggested View full abstract»

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  • A hierarchical circuit-level design methodology for microelectromechanical systems

    Page(s): 1309 - 1315
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (240 KB)  

    A circuit-level methodology for hierarchical design and nodal simulation of microelectromechanical systems (MEMS) is presented. A layout-based schematic view is introduced as a geometrically intuitive MEMS representation that is transformed into a schematic suitable for behavioral simulation. As examples of the design methodology, suspended-MEMS inertial sensors, resonant actuators, and filters are designed using a small set of geometrically parameterized plate, beam, gap, and anchor elements. Effects of manufacturing variations are evaluated by simply changing parameter values of the elements View full abstract»

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  • Behavioral model of reusable D/A converters

    Page(s): 1323 - 1326
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    In the context of the Virtual Socket Interface (VSI) system on a chip interface for embedded blocks, a behavioral model of a digital-to-analog converter is presented. A generic model, which is used for high-level design exploration, as well as an extracted model after synthesis, are presented. Both static (integral nonlinearity, differential nonlinearity) and dynamic behavior (glitch behavior, settling time) are modeled accurately. Power and area estimators are derived as well. The model results in efficient system simulations View full abstract»

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  • Reduced-order modeling of time-varying systems

    Page(s): 1273 - 1288
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (368 KB)  

    We present algorithms for reducing large circuits, described at SPICE-level detail, to much smaller ones with similar input-output behavior. A key feature of our method, called time-varying Pade (TVP), is that it is capable of reducing time-varying linear systems. This enables it to capture frequency-translation and sampling behavior, important in communication subsystems such as mixers and switched-capacitor filters, Krylov-subspace methods are employed in the model reduction process. The macromodels can be generated in SPICE-like or AHDL format, and can be used in both time- and frequency-domain verification tools. We present applications to wireless subsystems, obtaining size reductions and evaluation speedups of orders of magnitude with insignificant loss of accuracy. Extensions of TVP to nonlinear terms and cyclostationary noise are also outlined View full abstract»

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  • Behavioral modeling for hierarchical simulation of optronic systems

    Page(s): 1316 - 1322
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    In order to find the optimal design for a given specification of a lightwave communication link, an integrated simulation of electronic, optoelectronic, and optical components of a complete system is required. Models for optoelectronic and optical components written in HDL-ATM provide an accurate time-domain simulation of an entire optical communication system in a standard circuit simulator environment. The behavioral modeling approach, demonstrated in our work, can be used for transmission-layer simulations, as well as for co-simulation of control and physical levels of optical communication systems View full abstract»

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  • Models for systematic design and verification of frequency synthesizers

    Page(s): 1301 - 1308
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    Recently, much effort has been put on the integration of telecommunication front-ends. For a semiconductor company to follow the large market request in shortening the time-to-market constraint for new products, a systematic design methodology has to be followed, starting from a top-down design followed by a bottom-up verification. This paper provides, in models, each of these design phases for the example of frequency synthesizers. During the design phase, fast models are needed to explore the design space. On the other hand, accurate nonlinear models are derived for the verification phase to simulate complex specifications, e.g., the oscillator's output phase noise. An illustration of these models is based on the design of a 1.8 GHz CMOS frequency synthesizer View full abstract»

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  • VHDL-AMS-a hardware description language for analog and mixed-signal applications

    Page(s): 1263 - 1272
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    This paper provides an overview of the VHDL-AMS hardware description language for analog and mixed-signal applications, by describing the major elements of the language and illustrating them by examples View full abstract»

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Aims & Scope

This title ceased production in 2003. The current updated title is IEEE Transactions on Circuits and Systems II: Express Briefs.

Full Aims & Scope