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IEEE Transactions on Computers

Issue 8 • Date Aug 1999

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Displaying Results 1 - 9 of 9
  • Approximating elementary functions with symmetric bipartite tables

    Publication Year: 1999, Page(s):842 - 847
    Cited by:  Papers (78)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (196 KB)

    This paper presents a high-speed method for function approximation that employs symmetric bipartite tables. This method performs two parallel table lookups to obtain a carry-save (borrow-save) function approximation, which is either converted to a two's complement number or is Booth encoded. Compared to previous methods for bipartite table approximations, this method uses less memory by taking adv... View full abstract»

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  • Very high radix square root with prescaling and rounding and a combined division/square root unit

    Publication Year: 1999, Page(s):827 - 841
    Cited by:  Papers (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (340 KB)

    An algorithm for square root with prescaling and selection by rounding is developed and combined with a similar scheme for division. Since division is usually more frequent than square root, the main concern of the combined implementation is to maintain the low execution time of division, while accepting a somewhat larger execution time for square root. The algorithm is presented in detail, includ... View full abstract»

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  • Low-cost modular totally self-checking checker design for m-out-of-n code

    Publication Year: 1999, Page(s):815 - 826
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (324 KB)

    We present a low-cost (hardware-efficient) and fast totally self-checking (TSC) checker for m-out-of-n code, where m⩾3, 2m+1⩽n⩽4m. The checker is composed of four special adders which sum the 1s in the primary inputs added by appropriate constants, two ripple carry adders which sum the outputs of the biased-adders, and a t-variable two-rail code checker tree which compares the outputs ... View full abstract»

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  • Balanced codes with parallel encoding and decoding

    Publication Year: 1999, Page(s):794 - 814
    Cited by:  Papers (13)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (356 KB)

    A balanced code with k information bits and r check bits is a binary code of length n=k+r and cardinality 2k such that the number of 1s in each code word is equal to [n/2]. This paper describes the design of efficient balanced codes with parallel encoding and parallel decoding. In this case, since area and delay of such circuits are critical factors, another parameter is introduced in t... View full abstract»

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  • An easy-to-use approach for practical bus-based system design

    Publication Year: 1999, Page(s):780 - 793
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB)

    We present an easy-to-use model that addresses the practical issues in designing bus-based shared-memory multiprocessor systems. The model relates the shared-bus width, bus cycle time, cache memory, the features of a program execution, and the number of processors on a shared bus to a metric called request utilization. The request utilization is treated as the scaling factor for the effective aver... View full abstract»

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  • A note on the polynomial form of Boolean functions and related topics

    Publication Year: 1999, Page(s):860 - 864
    Cited by:  Papers (31)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (112 KB)

    This paper relates to a recently published partly tutorial article that presents some discussion of the polynomial form of Boolean functions and its applications based on the literature published in English and German. We show that a lot of the research in this area has also been done in Eastern Europe, and this note aims to present these unknown developments. The most recent work in this area is ... View full abstract»

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  • Closed-form expression for the average weight of signed-digit representations

    Publication Year: 1999, Page(s):848 - 851
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (120 KB)

    In radix-r number system, the minimal weight signed-digit (SD) representation has minimal number of nonzero signed-digits which belong to the set {±1, ±2, ..., ±(r-1)}. In this article, we derive closed form expressions for the average number of nonzero digits in the minimal weight SD representation and for the average length of the canonical SD representation, a special case ... View full abstract»

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  • Automatic synthesis of large telescopic units based on near-minimum timed supersetting

    Publication Year: 1999, Page(s):769 - 779
    Cited by:  Papers (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    In high-performance systems, variable-latency units are often employed to improve the average throughput when the worst-case delay exceeds the cycle time. Traditionally, units of this type have been hand-designed. In this paper, we propose a technique for the automatic synthesis of variable-latency units that is applicable to large data-path modules. We define and study an optimization problem, ti... View full abstract»

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  • Fast converter for 3 moduli RNS using new property of CRT

    Publication Year: 1999, Page(s):852 - 860
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB)

    This paper presents a new fast RNS converter for the 3 moduli set of the form {2n-1,2n,2n+1}. A new property of the Chinese remainder theorem (CRT) is also presented and this property is used to develop a fast converter for this 3 moduli set. The resulting implementation is based on carry-save adders and one carry-propagate adder stage, without the need for any loo... View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org