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Electronics Packaging Manufacturing, IEEE Transactions on

Issue 2 • Date April 1999

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Displaying Results 1 - 10 of 10
  • Editorial

    Page(s): 101 - 102
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    Freely Available from IEEE
  • Abstracts

    Page(s): 103 - 104
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    Freely Available from IEEE
  • A model for optimizing the assembly and disassembly of electronic systems

    Page(s): 105 - 117
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    This paper presents a methodology that incorporates simultaneous consideration of economic and environmental merit during the virtual prototyping phase of electronic product design. A model that allows optimization of a product life cycle, which includes primary assembly, disassembly, and secondary assembly using a mix of new and salvaged components, is described. Optimizing this particular life cycle scenario is important for products that are leased to customers or subject to product take-back laws. Monte Carlo simulation is used to account for uncertainty in the data, and demonstrates that high-level design and process decisions may be made with a few basic metrics and without highly specific data sets for every material and component used in a product. A web-based software tool has been developed that implements this methodology View full abstract»

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  • Optimization of via formation in photosensitive dielectric layers using neural networks and genetic algorithms

    Page(s): 128 - 136
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    Via formation using photosensitive polymer technology can reduce process cost by reducing process complexity and is hence of great interest in electronics packaging substrate fabrication. However, to overcome technical difficulties and to facilitate low-cost manufacturing, process modeling, optimization and control are required. In this paper, a process optimization approach for via formation in dielectric layers composed of photosensitive benzocyclobutene (BCB) for high density interconnect (HDI) in MCM-L/D substrates is presented. A series of designed experiments are used to characterize the via formation workcell (which consists of the spin coat, soft bake, expose, develop, cure, and plasma de-scum unit process steps). Neural network process models are then constructed to characterize via yield and geometry, as well as film thickness, retention, and uniformity. These models are used for process optimization using genetic algorithms (GA's) and hybrid combinations of GA's with the Powell algorithm and with the simplex algorithm. The optimized process recipes are verified experimentally. Comparison of the three approaches reveals that the hybrid GA/simplex method yields superior recipes View full abstract»

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  • SMD placement on three-dimensional circuit boards

    Page(s): 147 - 150
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    The effectiveness of surface-mount devices (SMD) placement on three-dimensional (3-D) molded interconnect devices (MID) is influenced by a number of factors, including component accuracy, the assembly machine, and the device itself. The objective of this research project was to model dimensional variations and further optimize the placement process. Optimal placement is achieved by determining the best lead-to-pad coverage. The chosen approach is demonstrated by simulating the placement process. Results show that the process can be significantly improved through an optimization procedure View full abstract»

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  • Optimization of high-speed multistation SMT placement machines using evolutionary algorithms

    Page(s): 137 - 146
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    Surface mount technology (SMT) is a robust methodology that has been widely used in the past decade to produce circuit boards. Analyses of the SMT assembly line have shown that the automated placement machine is often the bottleneck, regardless of the arrangement of these machines (parallel or sequential) in the assembly line. Improving and automating the placement machine is a key issue for increasing SMT production line throughput. This paper presents experimental results using genetic algorithms to optimize the feeder slot assignment problem for a high-speed parallel, multistation SMT placement machine. Four crossover operators, four selection methods, and two probability settings are used in our experiments. A penalty function is used to handle constraints. A comparison of genetic algorithms with several other optimization methods (human experts, vendor supplied software, expert systems, and local search) is presented, which supports the use of genetic algorithms for this problem View full abstract»

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  • Preventing conductive white residue formation by modifying the manufacturing process

    Page(s): 156 - 165
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    Soldering has long been the dominant means by which the electronic components are attached, mechanically and electrically to the circuits in which they will operate. The final step of the soldering process has traditionally been to clean the assemblies using an aggressive Chlorofluorocarbon (CFC) based cleaner to remove any “residue” which could retard electrical performance. Recently these cleaners have been banned by international convention requiring that the electronics industry look at the cleaning (and soldering) process in detail and identify ways to produce reliable electronics without using CFC cleaners. To explore every possible alternative to CFC cleaning, and make an evaluation is a complicated task, and could take years. This is beyond the scope of any one company who would have neither the time nor the funds to conduct such a detailed analysis. Such large-scale, detailed, exploratory work can be completed at an academic institution. However in the university environment one cannot typically verify their results in a “real” situation, as industrial guidance is necessary. Thus Boeing, Rensselaer, EMPF, and the Naval Air Warfare Center (NAWC) formed a collaborative project to address the cleaning problem. The challenge was to identify means by which conductive residue formation could be eliminated in the manufacturing environment-in the time period of one year. Simple experiments which simulated the wave soldering process were conducted at Rensselaer under the guidance of Boeing, EMPF, and NAWC. These results were assessed in a large-scale manufacturing environment at Boeing. By working together and pooling our strengths it was possible in a 15 month period to do the following. 1) Propose a two-step reaction mechanism describing residue formation in a humid environment. 2) Determine that controlling the fluxing reaction is likely to be the most effective way to reduce the likelihood of residue formation. 3) Examine the kinetics of residue formation in a humid environment. At the end of the paper ideas for future examination of this process are discussed, as is our evaluation of the collaboration. One benefit of such short-term collaborative efforts is that bachelors and masters level students and gain industrially significant experience at school. The results of this project are available on-line at http://saturn.vcu.edu/mapalmer/residue View full abstract»

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  • A study of the mixed-mode interfacial fracture toughness of adhesive joints using a multiaxial fatigue tester

    Page(s): 166 - 173
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    In this paper, a new technique is introduced for the control of the far field and mixed-mode crack tip of a single lap shear specimen with a crack along the interface. An investigation has been conducted to use one single lap shear specimen to obtain a series of values of interfacial fracture toughness as a function of the mixed-mode phase angle. The interfacial fracture behavior of the single lap shear specimen subjected to multiaxial concentrated line loads was investigated using a unique six-axis submicron tester coupled with a high density laser moire interferometer. The six-axis submicron tester was used to provide the displacement-controlled multiaxial concentrated line loads, whereas the moire interferometry technique was used to monitor the crack length during the test. In addition, a finite element technique was simultaneously used to determine the near crack tip displacement fields of the single lap shear specimen. The interfacial fracture toughness and phase angle were computed by using these near tip displacement variables through the analytical energy release rate and phase angle expressions derived by the authors. The results show that the facilities and methodology used in the current study can indeed be proved to possess the ability to control the far field and the mixed-mode conditions at crack tip, and to efficiently perform the mixed-mode fracture test View full abstract»

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  • Integrating environmental objectives in the operational planning of printed circuit board assembly

    Page(s): 118 - 127
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    This paper presents a methodology for operational control of printed circuit board (PCB) assembly systems with respect to environmental objectives for managing per-unit and per-setup waste flows. The approach builds upon the concept of unit process modeling, process chaining and evaluation of multicriteria effects first applied to product design. Three approaches are used to guide planning and control decisions for the management of hazard profiles at the facility level: product assignment, worker assignment, and a hybrid approach. The optimization models seek to balance overall waste mass and facility-level hazard given throughput constraints and demand requirements. A case example is given for scheduling six board types over four production lines in a two-shift operation View full abstract»

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  • Three-dimensional inspection of ball grid array using laser vision system

    Page(s): 151 - 155
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    An inspection process of the ball grid array (BGA) is proposed using a laser vision system which provides range image. This study suggests an inspection algorithm using the range images for evaluating the height of the solder ball, coplanarity and lead pitch, which are major factors in the BGA surface mounting technology. A feature-based algorithm was used in implementing region segmentation of range images. By deciding the BGA orientation using plane modeling, the errors of the range finding system were compensated and the reference of the height of the solder ball was found. Also, a method for measuring the height of the solder ball using free-form surface modeling was proposed. And, from the measured heights, the pitches and coplanarity were calculated View full abstract»

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Aims & Scope

IEEE Transactions on Electronics Packaging Manufacturing addresses design for manufacturability, cost and process modeling, process control and automation, factory analysis and improvement, information systems, statistical methods, environmentally friendly processing, and computer-integrated manufacturing for the production of electronic assemblies and products.

 

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
R. Wayne Johnson
Auburn University