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Solid-State Circuits, IEEE Journal of

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Solid-State Circuits, IEEE Journal of

Issue 6 • Date Jun 1999

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Doubly balanced dual-gate CMOS mixer

A 16-bit carry-lookahead adder using reversible energy recovery logic for ultra-low-energy systems

De-embedding the noise figure of differential amplifiers

A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology

A fully parallel vector-quantization processor for real-time motion-picture compression

A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recycling input/output buffers

SiGe driver circuit with high output amplitude operating up to 23 Gb/s

Miller and noise effects in a synchronizing flip-flop

Beware the three-way arbiter

A 2.5-V BiCMOS comparator with current-mode interpolation

Jitter and phase noise in ring oscillators

MOSFET-only switched-capacitor circuits in digital CMOS technology

Multiple twisted dataline techniques for multigigabit DRAMs

A 2-V, 1.8-GHz BJT phase-locked loop

Superharmonic injection-locked frequency dividers

A low-noise, low-power VCO with automatic amplitude control for wireless applications

A pixel-parallel image processor using logic pitch-matched to dynamic memory

Noise in current-commutating CMOS mixers

Current sensing differential logic: a CMOS logic for high reliability and flexibility

A 2.5-Gb/s clock and data recovery IC with tunable jitter characteristics for use in LANs and WANs

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