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Computers and Digital Techniques, IEE Proceedings E

Issue 6 • Date Nov 1989

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Displaying Results 1 - 17 of 17
  • Real-time collision avoidance system for multiple robots operating in shared work-space

    Publication Year: 1989 , Page(s): 478 - 484
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (608 KB)  

    The paper presents a method whereby the operation of multiple robots co-operating in a common workspace, can be continually monitored for potential collisions. The method described is applicable to robots with arbitrarily complex shapes, degrees of freedom and joint type, and provides collision detection in real time. View full abstract»

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  • Fault-tolerant loops for distributed measurement systems

    Publication Year: 1989 , Page(s): 485 - 489
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (460 KB)  

    A family of fault-tolerant loops, known as skip-braid networks, based on simple 2-input 2-output switching elements (or nodes) is proposed as an interconnection scheme for low-level devices in distributed measurement systems. These networks offer a degree of fault tolerance limited mainly by the allowable cabling overhead. Network scanning and reconfiguration routines are described which can locat... View full abstract»

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  • Design of synchronisers: a review

    Publication Year: 1989 , Page(s): 557 - 564
    Cited by:  Papers (2)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (700 KB)  

    The synchronisation of asynchronous inputs and metastability in synchronisers have haunted designers of digital systems for a long time. Even though the metastable behaviour of latches and other similar devices is now well understood, it is still a major limitation in digital systems which involve frequent asynchronous interaction. The problem has been studied both theoretically and practically an... View full abstract»

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  • Design of algorithm-based fault-tolerant VLSI array processor

    Publication Year: 1989 , Page(s): 539 - 547
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (624 KB)  

    A systematic design methodology which maps a matrix arithmetic algorithm to a fault-tolerant array processor with different topologies and dimensions is presented. The design issues to be addressed in the method are: (a) how to derive a VLSI array with different topologies and dimensions from the algorithm; (b) how to distribute the data processing to the PEs so that a faulty PE will result in lim... View full abstract»

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  • Reconfigurable testable bit-serial multiplier for DSP applications

    Publication Year: 1989 , Page(s): 517 - 523
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (700 KB)  

    A new testable and reconfigurable bit-serial multiplier is proposed. Fault tolerance is established through built-in self-testing and dynamic reconfiguration. During the reconfiguration phase, the faulty modules of the multiplier are automatically isolated and the system reconfigures itself for the required function with no need for external interference. Quadrupole-double modular redundancy (QDMR... View full abstract»

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  • Systolic architecture for finite field exponentiation

    Publication Year: 1989 , Page(s): 465 - 470
    Cited by:  Papers (4)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (456 KB)  

    A systolic pipeline architecture which can perform exponentiation function in a concurrent environment is presented. This function is computed in Galois fields. Under a steady-state condition the throughput of the architecture is shown to be the maximum, with the results appearing at every clock cycle. Being systolic in nature, the architecture is amenable to easy implementation in VLSI. View full abstract»

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  • Three-dimensional cellular automata and VLSI applications

    Publication Year: 1989 , Page(s): 490 - 495
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (436 KB)  

    Finite, three-dimensional (3-D), N*(N*N) cellular automata with boundary conditions are presented and discussed. It is shown that, depending on their local rule and the dimension N, these cellular automata exhibit group or semigroup algebraic structures similar to those in the one and two-dimensional (2-D) cases. The algebraic properties of these 3-D cellular automata are exploited in the implemen... View full abstract»

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  • Deductive fault diagnosis in digital circuits: a survey

    Publication Year: 1989 , Page(s): 496 - 504
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (940 KB)  

    Fault diagnosis in digital circuits is normally based on prior computation of fault symptoms using explicit fault models and simulation followed by matching of the observed symptoms of a faulty circuit with one of the sets of precomputed symptoms. Some attempts have been made, however, at diagnosis without fault simulation by deducing the location of a fault or faults from the observed symptoms an... View full abstract»

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  • Parallel VLSI algorithm for stable inversion of dense matrices

    Publication Year: 1989 , Page(s): 575 - 580
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (472 KB)  

    A fast, efficient, parallel algorithm for stable matrix inversion based on Givens plane rotations is described. The algorithm is implemented on VLSI systolic architecture that is capable of inverting any n*n nonsingular dense matrix in 5n units of time, including I/O time. The array architecture consists of n2+n processing elements (PEs) arranged as a cascade of two triangular arrays of... View full abstract»

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  • Hough technique for 3D object recognition

    Publication Year: 1989 , Page(s): 565 - 568
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (340 KB)  

    Advances in imaging techniques make it efficient to extract information such as the length and orientation of a straight edge in 3D space. An algorithm using the Hough technique is proposed for the recognition of objects which can be represented or characterised by a set of vertices and straight lines. Assuming the scale is known a priori, the orientation and translation of an object are determine... View full abstract»

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  • Advanced VLSI validated input security device employing data and hardware validation features

    Publication Year: 1989 , Page(s): 471 - 477
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (668 KB)  

    A fast CMOS VLSI device is described to execute the Data Encryption Standard (DES) algorithm. The device is known as the validated input security device (VISD) since it enables transmitted and received data to be validated through the use of parity checking. The device is directly compatible with most microprocessor families and it is also directly compatible with most DMA controllers. Full or par... View full abstract»

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  • Optimal number of disc clock tracks for block-oriented rotating associative processors

    Publication Year: 1989 , Page(s): 535 - 538
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (360 KB)  

    Block-oriented rotating associative processors provide a highly cost-effective solution to the need for parallel processing of large volumes of data in information storage and retrieval applications. Such processors are implemented by incorporating some processing logic into each read/write head of a fixed-head (head-per-track) disc memory. With non-self-clocked data recording, which offers higher... View full abstract»

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  • Automated acquisition of knowledge for an expert system for process control

    Publication Year: 1989 , Page(s): 548 - 556
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (920 KB)  

    Efficiency in industrial process is extremely important. Expert systems have been used in industrial processes with resulting improvements in efficiency. Expert systems rely on rules normally acquired by a knowledge engineer. These results comprise the knowledge of the expert system. The paper describes a system for the automated acquisition of knowledge for an expert system for process control. T... View full abstract»

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  • Design of graphics interface for computer-based biomedical applications

    Publication Year: 1989 , Page(s): 505 - 516
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (820 KB)  

    In the design of a graphics system two essential factors are always considered. These two factors are picture processing and the human interface to the computing system. The paper presents an integrated interface for display generation (IIDG). The design approach of the IIDG system relies on combining the formal grammar for identifying user actions and the grammatical description of objects into a... View full abstract»

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  • SST: scan self-test for sequential machines

    Publication Year: 1989 , Page(s): 569 - 574
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (556 KB)  

    A new scan, built-in self-test technique called SST for testing sequential machines (finite state machines) is presented. This technique uses an external linear feedback shift register (LFSR) or a cellular-automaton-based (CA-based) test pattern generator to generate exhaustive test patterns. These patterns are scanned into the machine and the output responses are scanned out for comparison. It is... View full abstract»

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  • Convex hull of chain-coded blob

    Publication Year: 1989 , Page(s): 530 - 534
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (276 KB)  

    An algorithm for the formation of the convex hull of a silhouette is described. Input data takes the form of a Freeman chain; arithmetic is limited to integer addition and subtraction. It is shown that the chains of the hull concavities may be readily derived, so facilitating the construction of a feature vector. View full abstract»

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  • Availability analysis of a certain class of distributed computer systems under the influence of hardware and software faults

    Publication Year: 1989 , Page(s): 524 - 529
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (436 KB)  

    There are modeling techniques which may be used to assess the availability of either the software or the hardware of distributed computer systems. However, from the practical point of view, it would be more useful to assess the availability when the system is subjected to the combined effect of hardware and software faults either during its normal operating time or repair time. Such an availabilit... View full abstract»

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