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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Issue 4 • Date Apr 1999

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Displaying Results 1 - 14 of 14
  • An experimental setup for studying the effect of noise on Chua's circuit

    Page(s): 517 - 520
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (124 KB)  

    The analog simulation of nonlinear dynamical systems is advantageous in some cases, i.e., when compared with the study using digital computers and, in particular, when one wishes to investigate the role of noise in these systems. In the present work we introduce two different methods of introducing a noise component in the most widely used chaotic circuit, namely, Chua's circuit, and apply these methods to study the effect of noise on identically driven chaotic circuits View full abstract»

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  • Recurrent neural networks for solving linear inequalities and equations

    Page(s): 452 - 462
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (476 KB)  

    This paper presents two types of recurrent neural networks, continuous-time and discrete-time ones, for solving linear inequality and equality systems. In addition to the basic continuous-time and discrete-time neural-network models, two improved discrete-time neural networks with faster convergence rate are proposed by use of scaling techniques. The proposed neural networks can solve a linear inequality and equality system, can solve a linear program and its dual simultaneously, and thus extend and modify existing neural networks for solving linear equations or inequalities. Rigorous proofs on the global convergence of the proposed neural networks are given. Digital realization of the proposed recurrent neural networks are also discussed View full abstract»

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  • Numerical calculation of gate-line delay in very large active matrix liquid crystal display with via holes

    Page(s): 435 - 441
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    The size of active matrix liquid crystal displays (AMLCD's) is restricted by the RC time constant of the gate conductor. This RC delay can be reduced considerably by connecting the gate line through via holes to a bus run on the back side of the substrate. In this paper, the maximum gate-line delay for the new structure is analyzed with network theory. We found that the delay is influenced by the pixel time constant, the resistance ratio of top line to back line, the number of via holes, the number of pixels, and the resistance ratio of driver source to top line. Explicit equations are derived for these relationships. Numerical calculations are carried out to discuss interesting practical cases. Our results show that with a low-resistance back line and only a few via holes per line, the delay can be reduced by nearly a factor of ten. The resistance ratio of driver to top line has an effect on the delay, and a linear equation is derived to describe this influence. The computed results agree with that from the SPICE simulation with high accuracy. Approximations of explicit equations are presented which can be very useful in the research and development of new structure View full abstract»

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  • Optimal scaling of digital controllers

    Page(s): 500 - 505
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (232 KB)  

    Scaling the inputs and outputs of a digital controller is necessary to guarantee that these signals do not exceed the dynamic range of the analog-to-digital and digital-to-analog converters. This paper gives two optimization problems that can be used to efficiently compute full-scaling matrices. An example that demonstrates the advantages of full scaling over the more conventional diagonal scaling is given View full abstract»

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  • Experimental Chua's circuit arrays as an autowave simulator

    Page(s): 495 - 499
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    A two-dimensional (2-D) array of electronic circuits is used to simulate the typical autowaves experimentally found in various active media (target and spiral waves). This experimental setup allows us to obtain some of the phenomena previously described in continuous media, but with a complete control on each cell and on the connections among them View full abstract»

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  • High-level canonical piecewise linear representation using a simplicial partition

    Page(s): 463 - 480
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1072 KB)  

    In this work, we propose a set of high-level canonical piecewise linear (HL-CPWL) functions to form a representation basis for the set of piecewise linear functions f: D→R1 defined over a simplicial partition of a rectangular compact set D in Rn. In consequence, the representation proposed uses the minimum number of parameters. The basis functions are obtained recursively by multiple compositions of a unique generating function γ, resulting in several types of nested absolute-value functions. It is shown that the representation in a domain in Rn requires functions up to nesting level n. As a consequence of the choice of the basis functions, an efficient numerical method for the resolution of the parameters of the high-level (HL) canonical representation results. Finally, an application to the approximation of continuous functions is shown View full abstract»

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  • An analog scheme for fixed-point computation-Part II: Applications

    Page(s): 442 - 451
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (308 KB)  

    In a companion paper [see ibid., vol. 44, p. 351-4, 1997] we presented theoretical analysis of an analog network for fixed-point computation. This paper applies these results to several applications from numerical analysis and combinatorial optimization, in particular: (1) solving systems of linear equations; (2) nonlinear programming; (3) dynamic programing; and (4) network flow computations. Schematic circuits are proposed for representative cases and implementation issues are discussed. Exponential convergence is established for a fixed-point computation that determines the stationary probability vector for a Markov chain. A fixed-point formulation of the single source shortest path problem (SPP) that will always converge to the exact shortest path is described. A proposed implementation, on a 2-μ complementary metal-oxide-semiconductor (CMOS) process, for a fully connected eight-node network is described in detail. The accuracy and settling time issues associated with the proposed design approach are presented View full abstract»

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  • Dual-loop iteration algorithm for steady-state determination of current-programmed dc/dc switching converters

    Page(s): 521 - 526
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (200 KB)  

    The methodology starts with separating the gate signal from the feedback circuit to the power stage in order to convert a closed-loop configuration into an open-loop one. The first iteration loop applies the Newton's method together with a time-domain simulation technique to find the steady-state state variables when the transformed configuration is operating at a constant duty cycle. The second iteration loop is to find the steady-state duty cycle using the secant method. The algorithm includes all of the advantages of a previously developed time-domain simulation technique and solves the nonconvergence problem in the single-loop iteration method, due to the amplifying effect of poor guess values of the state variables on the duty cycle in the feedback path during the iteration. A current-programmed boost converter is illustrated. The performances of the single-loop and the proposed methods are compared. The theoretical results are verified with the experimental measurements View full abstract»

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  • The L2-optimal time-delay rational Laplace model revisited

    Page(s): 505 - 512
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    An optimization technique is provided for the approximation of the pure time delay. Owing to a near-optimal starting point, the integral square error is reduced through a few iterations of a Gauss-Newton process. Compact implementation and robustness should encourage a large use in various engineering domains View full abstract»

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  • Chopper-stabilized amplifiers with a track-and-hold signal demodulator

    Page(s): 490 - 495
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (168 KB)  

    The conventional signal demodulator of a chopper amplifier can be substituted by track-and-hold (T/H) and averaging functions. This arrangement provides offset cancellation without requiring low-pass filters and can ignore the residual offset generated by input spikes. A noise analysis shows that this T/H demodulator degrades the white noise signal-to-noise ratio (SNR), although degradation can be minimized by using maximum duty cycle and minimum amplifier bandwidth View full abstract»

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  • Extension of the Cochrun-Grabel method to allow for mutual inductances

    Page(s): 481 - 483
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (140 KB)  

    The Cochrun-Grabel (C-G) method, an algorithm for finding the characteristic polynomial of a circuit containing reactances, has so far been restricted to circuits not employing mutual inductances. In this paper we present an intuitive, yet rigorous, proof of the Cochrun-Grabel method for a general RLC circuit, and we extend the method to allow the analysis of an RLC circuit containing mutual inductances View full abstract»

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  • Synthesis of switched-capacitor parametric bandpass filters

    Page(s): 484 - 490
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (168 KB)  

    A new approach to the synthesis of element simulation type bandpass switched-capacitor (SC) filters associated with parasitic capacitances is presented. The synthesis of a parametric bandpass LCR prototype is considered as a starting point of the method. The proposed approach allows one to design two-phase controlled SC filters with a low number of operational amplifiers. A predistortion technique is used for elimination of the influence of the parasitics on the circuit characteristics. A theoretical discussion as well as the results of computer simulation on a twelfth-order parametric bandpass SC filter is included View full abstract»

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  • A system theoretic approach to the stability of passively Q-switched lasers

    Page(s): 512 - 517
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (236 KB)  

    The rate equations of passively Q-switched lasers are considered. These equations represent the dynamics of the photon number in the laser cavity, the population inversion of the laser, and the ground-state population of the saturable absorber when excited by an input (pumping rate). In this work it is shown that for bounded inputs, the laser output is bounded. Furthermore, it is shown that when the input is switched off, the laser output converges to zero asymptotically. These stability results show that passively Q-switched lasers can operate safely View full abstract»

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  • A partitioning algorithm for the parallel solution of differential-algebraic equations by waveform relaxation

    Page(s): 421 - 434
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (364 KB)  

    Waveform relaxation is a natural method for the solution of large systems of differential-algebraic equations (DAEs), particularly in cases when the variables exhibit multirate behavior and latency. The performance of this method depends heavily on the ability to partition the equations into weakly coupled subsystems. With that in mind, in this paper we present a new multilevel partitioning algorithm which can achieve this for a general class of equations. The algorithm is based on successive applications of epsilon decomposition to the Jacobian which arises in the numerical solution of the equations. A variety of experimental results are provided to evaluate the performance of this method View full abstract»

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