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Solid-State Circuits, IEEE Journal of

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Solid-State Circuits, IEEE Journal of

Issue 4 • Date Apr 1999

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An eighth-order bandpass ΔΣ modulator for A/D conversion in digital radio

An integrated CMOS micromechanical resonator high-Q oscillator

A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHz

A register-controlled symmetrical DLL for double-data-rate DRAM

An analog synchronous mirror delay for high-speed DRAM application

A 600-dpi capacitive fingerprint sensor chip and image-synthesis technique

Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface

New three-dimensional memory array architecture for future ultrahigh-density DRAM

A design and implementation of fully programmable switched-current IIR filters

High-speed, highly sensitive OEIC using clocked vertical BJT's photoDarlington in CMOS technology

A fully digital, energy-efficient, adaptive power-supply regulator

A 2.2-V operation, 2.4-GHz single-chip GaAs MMIC transceiver for wireless applications

Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems

A three-axis micromachined accelerometer with a CMOS position-sense interface and digital offset-trim electronics

A resistance-variation-tolerant constant-power heating circuit for integrated sensor applications

Low-power clock-deskew buffer for high-speed digital circuits

A 1-Gb/s bidirectional I/O buffer using the current-mode scheme

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