Solid-State Circuits, IEEE Journal of
Issue 1 • Date Jan. 1999
Society Sponsor
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Displaying Results 1 - 20 of 20
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Correction to "A 70-Mb/s Variable-Rate 1024-QAM Cable Receiver IC with Integrated 10-b ADC and FEC Decoder"
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PDF (254 KB)
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Addition to "Design and Implementation of an Untrimmed MOSFET-Only 10-bit A/D Converter with -79-dB THD"
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PDF (254 KB)
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Spatial characterization of process variations via MOS transistor time constants in VLSI and WSI
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PDF (112 KB)
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Linear and nonlinear characteristics of the silicon CMOS monolithic 50-Ω microwave and RF control element
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PDF (72 KB)
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A 12-ps-resolution digital variable-delay macro cell on GaAs 100 K-gates gate array using a meshed air bridge structure
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PDF (664 KB)
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A wide-dynamic-range, high-transimpedance Si bipolar preamplifier IC for 10-Gb/s optical fiber links
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PDF (268 KB)
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A 557-mW, 2.5-Gbit/s SONET/SDH regenerator-section terminating LSI chip using low-power bipolar-LSI design
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PDF (444 KB)
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A 5-MHz IF digital FM demodulator
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PDF (364 KB)
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A unified submicrometer MOS transistor charge/capacitance model for mixed-signal IC's
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PDF (124 KB)
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A new true-single-phase-clocking BiCMOS dynamic pipelined logic family for high-speed, low-voltage pipelined system applications
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PDF (328 KB)
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A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC)
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PDF (540 KB)
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Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages
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PDF (112 KB)
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A 5-GHz-band multifunctional BiCMOS transceiver chip for GMSK modulation wireless systems
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PDF (732 KB)
Aims & Scope
The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.
Meet Our Editors
Editor-in-Chief
Un-Ku Moon
Oregon State University, EECS
