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IEE Proceedings E - Computers and Digital Techniques

Issue 1 • Date Jan 1990

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Displaying Results 1 - 11 of 11
  • Universal shift matrix

    Publication Year: 1990, Page(s):57 - 64
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (556 KB)

    Serial shifting techniques are slow whereas a totally parallel approach, though fast, is impractical for implementational reasons. A novel intermediate approach is presented whereby circular shifting is performed over two or three levels depending on the factorisation of the shift length n. The use of read-only memories to control its operation and to provide arithmetic and logical shifting produc... View full abstract»

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  • Linear quadtree algorithms for transputer array

    Publication Year: 1990, Page(s):114 - 128
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1080 KB)

    The quadtree is a hierarchical data model based upon a regular recursive decomposition of space, which has been found useful in such areas as image processing, computer graphics, cartography and spatial information systems. The linear quadtree is a pointerless representation of the quadtree. In the paper, a number of linear quadtree algorithms are presented for a transputer array. These form a lar... View full abstract»

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  • Hierarchical design of delay-insensitive systems

    Publication Year: 1990, Page(s):41 - 56
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1116 KB)

    A set of building blocks is presented for the hierarchical design of delay-insensitive systems. It consists of delay-insensitive (DI) building blocks and hybrid (non-DI) building blocks. An extended signal transition graph (STG) model is used for circuit specification and analysis. It permits the clear specification of delay-insensitive circuits, distinguishing between environment/module behaviour... View full abstract»

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  • Reed-Muller canonical forms with mixed polarity and their manipulations

    Publication Year: 1990, Page(s):103 - 113
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (676 KB)

    The set of 3n consistent mixed-polarity Reed-Muller canonical forms of an n-variable switching function is described and the means whereby each form may be derived by a transform on the zero-polarity form is investigated. The computational cost of deducing the optimum polarity expansion is evaluated for various strategies. A ternary map-based method is introduced which enables this sear... View full abstract»

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  • Co-operative computing and control

    Publication Year: 1990, Page(s):1 - 16
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1104 KB)

    The pace of innovation in the information technologies continues unabated, and massive investment in the digital infrastructure required for distributed information systems is proceeding steadily. The paper summarises some of the basic technology trends of the past five years and describes some of the consequent systems trends, including workstation networks, open system standards, digital communi... View full abstract»

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  • Transformation of timed Petri nets for response time estimation

    Publication Year: 1990, Page(s):74 - 80
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (588 KB)

    Proposes a transformation method for the simplification of timed Petri nets to estimate the response time. A complicated time Petri net which is live and safe is transformed into a simpler one with a smaller state space by hierarchically replacing a convertible subnet with the corresponding decision net. It is shown that the information for the response time analysis is not lost but is kept during... View full abstract»

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  • Survey of square rooting algorithms

    Publication Year: 1990, Page(s):31 - 40
    Cited by:  Papers (19)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (912 KB)

    The paper reviews the algorithms for the computation of square roots for binary machines. After an initial classification, the algorithms are analysed in detail by considering their specific peculiarities and properties. Finally, some comments are made regarding their ideal and effective implementation in hardware, software or microcode. View full abstract»

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  • Implementation of 32-bit RISC processor incorporating hardware concurrent error detection and correction

    Publication Year: 1990, Page(s):88 - 102
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1064 KB)

    The need for reliable integrated circuits is becoming of paramount importance as they are increasingly used in a range of safety critical applications or domestic products. In the past reliability has been achieved at the IC level by comprehensive testing of the device after manufacture. The use of scan design and BILBO techniques have assisted designers in achieving the necessary high test covera... View full abstract»

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  • Traffic routing algorithm for serial superchip system customisation

    Publication Year: 1990, Page(s):65 - 73
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (688 KB)

    A traffic routing algorithm is presented for system customisation of the serial superchip architecture. In modern signal processing and scientific computation, system reconfigurability is highly desired to achieve dynamic reconfiguration during system operation and static reconfiguration. For example, for defect/fault tolerance before system operation. The superchip architecture is aimed at achiev... View full abstract»

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  • Four-slot fully asynchronous communication mechanism

    Publication Year: 1990, Page(s):17 - 30
    Cited by:  Papers (17)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1328 KB)

    The paper is concerned with communication mechanisms in which a record in shared memory is maintained by a writer to provide a coherent and up-to-date data reference which may be accessed at any time by a reader. The dynamic properties of several possible designs are briefly discussed before concentrating on a fully asynchronous form called a four-slot mechanism. This takes its name from the four-... View full abstract»

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  • Efficient characterisation of cellular automata

    Publication Year: 1990, Page(s):81 - 87
    Cited by:  Papers (25)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (452 KB)

    The paper characterises cellular automata (CA) with the help of matrix algebra. It has been shown how k-neighborhood additive CA rules (uniform, complemented and hybrid) can be represented with the help of a characteristic matrix representing the CA. Further, the paper discusses how the global group properties of the automata depend on the hybridisation of rules, the length of the automata, the st... View full abstract»

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