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IEE Proceedings - Computers and Digital Techniques

Issue 3 • Date May 1998

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Displaying Results 1 - 12 of 12
  • Generalised model for Banyan networks with nonuniform traffic

    Publication Year: 1998, Page(s):225 - 228
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (392 KB)

    Interconnection networks are central components in two different environments: multiprocessor systems and ATM switching systems. They have been analysed extensively in either one of the two environments. However, most of the analyses assume uniform traffic. Only recently have some analyses considered nonuniform traffic, but with some restrictions either on the traffic or on the network. In this pa... View full abstract»

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  • SPARC-based VLIW testbed

    Publication Year: 1998, Page(s):215 - 224
    Cited by:  Papers (4)  |  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1196 KB)

    The performance of very long instruction word (VLIW) microprocessors depends on the close co-operation between the compiler and the architecture. To design a high-performance VLIW a testbed is required that allows detailed co-evaluation of both compilation techniques and architectural features. The paper introduces a new VLIW testbed based on the SPARC instruction set architecture, which includes ... View full abstract»

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  • Mapping finite element grids onto parallel multicomputers using a self-organising map

    Publication Year: 1998, Page(s):211 - 214
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (336 KB)

    LSOM (load-balancing self-organising map), a neural network based on Kohonen's self-organising map, is proposed for the problem of mapping finite element method (FEM) grids to distributed memory parallel computers with mesh interconnection networks. The rough global ordering produced by LSOM is combined with the local refinement Kernighan-Lin algorithm (LSOM-KL) to obtain the solution. LSOM-KL ach... View full abstract»

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  • Evolutionary approach to hardware/software partitioning

    Publication Year: 1998, Page(s):203 - 209
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (772 KB)

    The authors present an approach to hardware/software codesign of real-time embedded systems. Two of the difficulties associated with codesign are handling tradeoffs among multiple attributes and exploring a large design space. They use a combination of techniques from the evolutionary computation and utility theory fields to address these problem areas. A real-time microcontroller-based design exa... View full abstract»

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  • Presynthesis partitioning for hardware/software cosynthesis

    Publication Year: 1998, Page(s):197 - 202
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (664 KB)

    A novel presynthesis algorithm for partitioning processes in distributed embedded computing systems is presented. The approach redesigns the task graph specification for a system to partition the processes that comprise the tasks into efficiently sized units of computation. Partitioning estimates the total system performance by estimating the final allocation of processes to processing elements. T... View full abstract»

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  • Design of a basic cell to construct embryonic arrays

    Publication Year: 1998, Page(s):242 - 248
    Cited by:  Papers (11)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (552 KB)

    Embryonic systems are cellular arrays with reconfiguration characteristics similar to those found in biological cellular organisms. Properties such as multicellular organisation, cellular differentiation and cellular division provide embryonic arrays with biological-like fault tolerance properties. This paper presents the detailed description of a basic cell to be used as the building block of emb... View full abstract»

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  • Transformational partitioning for codesign

    Publication Year: 1998, Page(s):181 - 195
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1296 KB)

    This paper presents the underlying methodology of Cosmos: an interactive approach for hardware/software codesign capable of handling multiprocessor systems and distributed architectures. The approach covers the codesign process through a set of user guided transformations allowing semiautomatic partitioning. The transformations are based on a powerful set of primitives for functional partitioning,... View full abstract»

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  • Area-time-efficient VLSI residue-to-binary converters

    Publication Year: 1998, Page(s):229 - 235
    Cited by:  Papers (9)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (528 KB)

    The authors present highly area-time-efficient VLSI implementations of residue reverse converters called compressed multiply accumulate (CMAC) converters. This efficiency results from carefully identifying and eliminating redundancy in existing proposals. Specifically, the partial sum generation and addition are merged into a single carry-save addition operation. Also, module multipliers are repla... View full abstract»

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  • Automatic generation of reprogrammable microcoded controllers within a high-level synthesis environment

    Publication Year: 1998, Page(s):155 - 160
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (544 KB)

    Existing techniques in high-level synthesis mostly assume a simple controller model in the form of a single FSM. In reality more complex controller architectures are often used. On the other hand, in the case of programmable processors the controller architecture is largely defined by the available control-flow instructions in the instruction set. With the wider acceptance of behavioural synthesis... View full abstract»

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  • CodeSign: an embedded system design environment

    Publication Year: 1998, Page(s):171 - 180
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1308 KB)

    A modelling environment is described for the automated design of embedded systems. The basic model of computation consists of a class of high-level time Petri nets augmented with object-oriented mechanisms. It is formal, ensuring unambiguous specification, supports a high level of analysis and is general enough to support other more specialised formalisms. This model constitutes a major part of th... View full abstract»

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  • Systolic dual basis serial multiplier

    Publication Year: 1998, Page(s):237 - 241
    Cited by:  Papers (3)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (412 KB)

    The paper presents a systolic serial dual basis multiplier for the Galois field GF(2m) which is based on the Berlekamp-like multiplication algorithm. It needs only one control signal and is easy to simplify for the field which is generated by the irreducible polynomial xm+x+1. The multiplier's architecture is highly regular, modular and easily expandable, hence it is suitable... View full abstract»

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  • Design space exploration techniques for the codesign of embedded data processing systems

    Publication Year: 1998, Page(s):161 - 170
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1592 KB)

    Embedded systems, which combine an implementation of their functionality in hardware and software, are of increasing interest to information processing in dedicated systems of various areas, such as automotive, instrumentation, robotics or telecom. The requirements of such systems impose a design methodology known as codesign, result in co-operating engineering efforts conceive and to implement ef... View full abstract»

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