Issue 2 • Date Feb 1998
Filter Results
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A compact and unified MOS DC current model with highly continuous conductances for low-voltage ICs
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PDF (132 KB)
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Speeding up pipelined circuits through a combination of gate sizing and clock skew optimization
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PDF (316 KB)
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A controller redesign technique to enhance testability of controller-data path circuits
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PDF (276 KB)
Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


