By Topic

IEEE Design & Test of Computers

Issue 2 • Date April-June 1998

Filter Results

Displaying Results 1 - 10 of 10
  • A D&T Roundtable: Testing Mixed Logic and DRAM Chipshigher throughput devices has put the integration of DRAM into a new spectrum.]

    Publication Year: 1998, Page(s):86 - 92
    Request permission for commercial reuse | PDF file iconPDF (339 KB)
    Freely Available from IEEE
  • Control and observation structures for analog circuits

    Publication Year: 1998, Page(s):56 - 64
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (140 KB)

    No previously proposed analog built-in self-test method allows simultaneous control of all test points, the basic diagnosis capability required for analog circuits. This paper provides an approach that allows observation and control of DC voltage levels of all test points simultaneously, with a calibration process that ensures accuracy View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The future: plug and pray?

    Publication Year: 1998, Page(s):8 - 13
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (76 KB)

    In his keynote speech at the 1998 International Test Conference, held last November in Washington, D.C., the author presented a view of our increasing dependence on electronic systems and the impact this is likely to have on the way we design and test new products. Here, he summarizes his major points View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Codesign of embedded systems: status and trends

    Publication Year: 1998, Page(s):45 - 54
    Cited by:  Papers (73)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (108 KB)

    Ever increasing embedded system design complexity combined with a very tight time-to-market window has revolutionized the embedded-system design process. The concurrent design of hardware and software has displaced traditional sequential design. Further, hardware and software design now begins before the system architecture (or even the specification) is finalised. System architects, customers, an... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Functional fault models for analog circuits

    Publication Year: 1998, Page(s):80 - 85
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (116 KB)

    For devices containing analog integrated circuits, the appropriate fault models are those that describe components at the functional level. Functional models proposed in the past have been too complicated for practical use. The models proposed here form the basis of simpler test selection techniques for analog ICs View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • SUAVE: extending VHDL to improve data modeling support

    Publication Year: 1998, Page(s):34 - 44
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (120 KB)

    Our aim in the SUAVE (SAVANT and University of Adelaide VHDL Extensions) Project is to improve support for high-level modeling and reuse in VHDL. A number of previous proposals also address these goals. SUAVE extends the language with object-orientation and genericity features and generalizes some existing features. Extending VHDL in this way has the side effect of improving its expressiveness at ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Integrating HDL synthesis and partitioning for multi-FPGA designs

    Publication Year: 1998, Page(s):65 - 72
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (116 KB)

    The authors examine the interaction of HDL synthesis and multi-FPGA partitioning on designs with varying structural characteristics and HDL coding styles. They demonstrate that an integrated synthesis and partitioning methodology is crucial to achieving high-density designs View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Tracing the thermal behavior of ICs

    Publication Year: 1998, Page(s):14 - 21
    Cited by:  Papers (16)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (320 KB)

    Today's increased power and packaging densities demand designers' attention to the effects of heat on ICs. The authors review thermal and electrothermal simulation and measurement methods, thermal package characterization, and the concept and techniques of design for thermal testability View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A unified design methodology for offline and online testing

    Publication Year: 1998, Page(s):73 - 79
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    This article proposes a unified test design methodology for both offline and online testing. The methodology's purpose is the development of homogeneous test algorithms and test strategies on different abstraction levels of computer systems, from gate level, through register-transfer level, to system level. It uses VHDL design descriptions and provides testing of both separate and combined abstrac... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Matisse: an architectural design tool for commodity ICs

    Publication Year: 1998, Page(s):22 - 33
    Cited by:  Papers (8)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    To accelerate industrial adoption of behavioral synthesis, we have developed Matisse, an architectural design tool that increases productivity without sacrificing area, performance, or power. Matisse's main difference from traditional behavioral synthesis tools is that it lets the designer play a key role. It allows the designer to make major decisions about styles, protocols, parallelism, delays,... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.

Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty