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IEEE Design & Test of Computers

Issue 4 • Aug. 1989

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  • The impact of boundary scan on board test

    Publication Year: 1989, Page(s):18 - 30
    Cited by:  Papers (14)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1087 KB)

    Three categories of approaches to board test in manufacturing today are discussed: as a sorting process; as a repair driver: and as a process monitor. The costs associated with each are briefly examined. Elements in the overall testing and manufacturing process that can sabotage the success of a board-test operation are described. They are inaccuracies, misdiagnosis, test-repair looping, and handl... View full abstract»

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  • Scan-path architecture for pseudorandom testing

    Publication Year: 1989, Page(s):32 - 48
    Cited by:  Papers (6)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1270 KB)

    The author presents an architecture for implementing scan technology in a state-of-the-art workstation that uses a single resource to control scan and clock functions and perform pseudorandom testing of individual chips and boards. The testing approach, which is based on the use of a linear-feedback shift register, also features the ability to capture test results and compress them into a single s... View full abstract»

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  • Failure diagnosis of structured VLSI

    Publication Year: 1989, Page(s):49 - 60
    Cited by:  Papers (189)  |  Patents (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (879 KB)

    The authors describe a method for diagnosing the failures observed in testing VLSI designs that use the scan-path structure. Diagnosis consists of simulating selected faults after testing using a fault simulator that allows the application of several patterns in parallel. The method is also suitable for signature-based random-pattern testing. The authors discuss diagnostic fault simulation, fault-... View full abstract»

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This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

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