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Microwave Theory and Techniques, IEEE Transactions on

Issue 9 • Date Sep 1989

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Displaying Results 1 - 25 of 29
  • 35 GHz GaAs power MESFETs and monolithic amplifiers

    Publication Year: 1989 , Page(s): 1327 - 1333
    Cited by:  Papers (4)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (596 KB)  

    GaAs MESFETs optimized for power operation at 35 GHz are described. Various doping levels and potential barrier layers at the interface between the buffer and the active layers were studied. The best power performance was obtained from an FET on a very heavily doped active layer. A device on an AlGaAs heterobuffer had further improved output power. The best devices delivered output power densities of 0.8 W/mm with 23% efficiency, 0.71 W/mm with 34% efficiency, and 0.61 W/mm with 41% efficiency. Monolithic power amplifiers with a 400-μm FET generated 200 mW of output power. These amplifiers were monolithically power combined, resulting in 600 mW of output power at 34 GHz View full abstract»

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  • A new GaAs power MESFET structure for improved power capabilities

    Publication Year: 1989 , Page(s): 1334 - 1339
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (500 KB)  

    A GaAs microwave power MESFET structure is described that achieves a significant improvement of the gate mode attenuation by incorporating a suitably terminated transmission line parallel to the gate. The reduced attenuation allows a much wider single gate (a factor of 4 is possible) and a corresponding improvement of the total output power. It is shown that this approach leads to higher gain and cutoff frequency. An additional advantage of this MESFET structure is its higher input resistance relative to a device with equal total gate width but more gates in parallel. This results in simpler matching circuits of greater bandwidth. The single-gate structure can be connected in parallel to further increase the total output power. The results of an electrical characterization of the devices are presented, and its advantages and potential application are discussed View full abstract»

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  • GaAs heterojunction bipolar transistor device and IC technology for high-performance analog and microwave applications

    Publication Year: 1989 , Page(s): 1286 - 1303
    Cited by:  Papers (82)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1680 KB)  

    GaAs-AlGaAs n-p-n heterojunction bipolar transistor (GaAs HBT) technology and its application to analog and microwave functions for high-performance military and commercial systems are discussed. In many applications the GaAs HBT offers key advantages over the alternative advanced silicon bipolar and III-V compound field-effect-transistor (FET) approaches. TRW's GaAs HBT device and IC fabrication process, basic HBT DC and RF performance, examples of applications, and technology qualification work are presented and serve as a basis for addressing general capability issues. A related 3-μm emitter-up, self-aligned HBT IC process provides excellent DC and RF performance, with simultaneous gain-bandwidth product, fT, and maximum frequency of oscillation, fmax, of approximately 20-40 GHz and DC current gain β≈50-100 at useful collector current densities ≈3-10 kA/cm2, early voltage ≈500-1000 V, and MSI-LSI integration levels. These capabilities facilitate versatile DC-20-GHz analog/microwave as well as 3-6 Gb/s digital applications, 2-3 G sample/s A/D conversion, and single-chip multifunctions with producibility View full abstract»

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  • An analytical two-dimensional perturbation method to model submicron GaAs MESFETs

    Publication Year: 1989 , Page(s): 1484 - 1487
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (252 KB)  

    A two-dimensional analytical model has been developed for finding the potential distribution in submicron GaAs MESFETs. The potential distribution is obtained by solving Poisson's equation with nonrectangular boundary conditions using a perturbation method. The expression for the potential is used to derive the current-voltage relation for GaAs MESFETs having channel lengths ranging from 0.2 to 0.9 μm. The model is applicable in the linear, saturation, and subthreshold regimes of the current-voltage characteristics. Numerically simulated results are compared with experimental data and are found to be in good agreement View full abstract»

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  • Numerical simulation of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate compensated by deep traps

    Publication Year: 1989 , Page(s): 1371 - 1379
    Cited by:  Papers (5)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (668 KB)  

    A numerical analysis of GaAs MESFETs with a p-buffer layer on a semi-insulating substrate is performed in which impurity compensation by traps in the substrate is considered. It is shown that the use of a thick p-buffer layer results in a lower device current due to the formation of a steep barrier at the channel-substrate interface. It is also shown that with higher trap and acceptor densities in the substrate, the drain current is reduced due to the decrease in the substrate current. This decrease occurs because a negative-space-charge layer is formed in the substrate. It is demonstrated that when the p-buffer layer is fully depleted, its acceptors play the same electrical role as the acceptors within the space-charge region of the semi-insulating substrate. Thus, using a thick p-buffer layer has the same effect as using a substrate with a high density of traps, i.e. it minimizes the short-channel effects in GaAs MESFETs. Therefore, if the trap density in the substrate is low, the short-channel effects can be reduced by introducing a p-buffer layer or a buried p-layer View full abstract»

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  • Computer-aided noise analysis of MESFET and HEMT mixers

    Publication Year: 1989 , Page(s): 1401 - 1410
    Cited by:  Papers (28)  |  Patents (103)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (696 KB)  

    A numerical approach to the noise analysis of MESFET and HEMT mixers of arbitrary topology is discussed. A qualitative picture of the complex physical mechanisms responsible for the generation of the intermediate frequency (IF) noise is outlined, and the corresponding computational algorithms are presented. The derivation of a noisy nonlinear model for the microwave FET is addressed, and it is shown that a satisfactory solution to this problem can be obtained by combining a conventional time-domain model with standard noise information. The method has been implemented in a computer program designed to work in conjunction with an existing general-purpose harmonic-balance simulator. An application is described in detail to demonstrate the excellent performance of this software tool View full abstract»

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  • A process-dependent worst-case analysis for MMIC design based on a handy MESFET simulator

    Publication Year: 1989 , Page(s): 1442 - 1451
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (772 KB)  

    The design of inexpensive MMIC modules implies a practical use of worst-case analysis. A reliable equivalent circuit model based on the unavoidable dispersion of uncorrelated technological parameters is proposed. The method relies on a convenient MESFET simulator which provides the DC, RF and noise parameters for any bias conditions. The input data are geometrical or electrical information readily available to the designer. The results of using the proposed model are compared with experimental data from several GaAs MMIC manufacturers. The model was also successfully applied to the design of a monolithic C-band amplifier. The forecasts of the worst-case analysis are compared with the experimental results for this amplifier View full abstract»

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  • Large-signal model of picosecond FETs and measurement of the step response

    Publication Year: 1989 , Page(s): 1460 - 1465
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (484 KB)  

    An FET large-signal model is developed for the time-domain computer-aided design (CAD) of ultrafast circuits. Numerical 2-D look-up tables describe the nonlinear parameters; a DC and microwave FET characterization as a function of bias voltage, followed by parameter extraction, completely determines the tables of parameters. The model can be implemented with simulators handling 2-D tables and applied to commercial transistors without a detailed knowledge of the internal structure of the device. The step response of an NEC710 MESFET is measured and compared with the prediction of the model, demonstrating its accuracy in representing switching waveforms and transient phenomena in the range covering tens of picoseconds. The 20-ps switching time of the NEC710 shows that the modeling methodology, measurement, and simulation are adequate for studying picosecond transient phenomena in single transistors View full abstract»

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  • Computer-aided design of hybrid and monolithic broad-band amplifiers for optoelectronic receivers

    Publication Year: 1989 , Page(s): 1475 - 1478
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (508 KB)  

    In very-high-data-rate fiber-optic systems, it is necessary to have an ultrawideband, high-gain, low-noise amplifier after the front end. The authors show how powerful analytical techniques, such as the real frequency technique, can be applied to the design of a 4-MHz-7-GHz amplifier. A two-stage monolithic amplifier designed according to the theory gives 17-dB gain; a three-stage hybrid amplifier exhibits 16-dB gain across the same frequency band. The gain, noise figure, and pulse response of each amplifier are presented View full abstract»

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  • Ion-implanted high microwave power indium phosphide transistors

    Publication Year: 1989 , Page(s): 1321 - 1326
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (516 KB)  

    Encapsulated rapid thermal annealing (RTA) has been used in the fabrication of indium phosphide (InP) power metal-insulator-semiconductor field-effect transistors (MISFETs) with ion-implanted source, drain, and active channel regions. The MISFETs had a gate length of 1.4 μm. Six to ten gate fingers per device, with individual gate finger widths of 100 or 125 μm, were used to make MISFETs with total gate widths of 0.75, 0.8, or 1 mm. The source and drain contact regions and the channel region of the MISFETs were fabricated using silicon implants in semi-insulating InP at energies from 60 to 360 keV with doses from 1×1012 to 5.6×1014 cm-2. The implants were activated using RTA at 700°C for 30 s in N2 or H2 ambients using a silicon nitride encapsulant. The high-power, high-efficiency MISFETs were characterized at 9.7 GHz, and the output microwave power density for the RTA conditions used was as high as 2.4 W/mm. For a 1-W input at 9.7 GHz gains up to 3.7 dB were observed, with an associated power-added efficiency of 29%. The output power density was 70% greater than that reported for GaAs MESFETs View full abstract»

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  • AlInAs-GaInAs HEMT for microwave and millimeter-wave applications

    Publication Year: 1989 , Page(s): 1279 - 1285
    Cited by:  Papers (26)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (564 KB)  

    The status of lattice-matched high-electron-mobility transistors (HEMTs) and pseudomorphic AlInAs-GaInAs grown on In substrates is reviewed. The best lattice-matched devices with 0.1-μm gate length had a transconductance gm=1080 mS/mm and a unity current gain cutoff frequency fT=178 GHz, whereas similar pseudomorphic HEMTs had gm=1160 mS/mm and fT=210 GHz. Single-stage V-band amplifiers demonstrated 1.3- and 1.5-dB noise figures and 9.5- and 8.0-dB associated gains for the lattice-matched and pseudomorphic HEMTs, respectively. The best performance achieved was a minimum noise figure of Fmin=0.8 dB with a small-signal gain of Ga=8.7 dB View full abstract»

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  • An analytical model for I-V and small-signal characteristics of planar-doped HEMTs

    Publication Year: 1989 , Page(s): 1395 - 1400
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (436 KB)  

    An analytical current-voltage (I-V) model for planar-doped HEMTs is developed. This compact model covers the complete range of I-V characteristics, including the current saturation region and parasitic conduction in the electron-supplying layer. Analytical expressions for the small-signal parameters and current-gain cutoff frequency are derived from the I-V model. Modeling results for a 0.1-μm-gate planar-doped AlInAs-GaInAs HEMT show excellent agreement with measured characteristics. Threshold voltages and parasitic conduction in planar-doped and uniformly doped HEMTs are also compared and discussed View full abstract»

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  • FET-based planar circuits for quasi-optical sources and transceivers

    Publication Year: 1989 , Page(s): 1452 - 1459
    Cited by:  Papers (20)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (620 KB)  

    The circuits that are simple in construction and exhibit isotropic conversion gain are discussed. Both single-device and balanced transmitter and transceiver circuits are described. Balanced sources are presented that can be operated in push-pull mode for frequency doubling. A single-FET quasi-optical oscillator circuit using a microstrip patch linear array and having an effective radiated power of 31.6 dBm at 10 GHz is reported. A dual-FET frequency-doubling oscillator circuit using a coupled rampart line antenna with an effective radiated power of 21.6 dBm at 19.7 GHz is also described. Quasi-optical transceiver elements are presented that use the FETs as both signal sources and self-oscillating mixers for down-conversion of the received signal. The application of these transceiver elements to Doppler motion detection is reported View full abstract»

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  • DC and transmission line models for a high electron mobility transistor

    Publication Year: 1989 , Page(s): 1361 - 1370
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (692 KB)  

    Two improved DC models are developed to describe the output I -V (current-voltage) characteristics and small-signal parameters of a GaAs high-electron-mobility transistor (HEMT). A simple analytical, nonlinear, charge-control model for a two-dimensional electron gas is introduced and included in one of the DC models. The HEMT is modeled as a transmission line for the microwave-frequency AC analysis, and its microwave performance is predicted by the parameters obtained from fitting DC characteristics. Both DC and AC model predictions show a good agreement with experimental results for a 0.3-μm GaAs HEMT View full abstract»

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  • Attenuation compensation in distributed amplifier design

    Publication Year: 1989 , Page(s): 1425 - 1433
    Cited by:  Papers (32)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (680 KB)  

    A high-gain common-gate FET that presents at its drain a broadband impedance characterized by a (frequency-dependent) negative resistance and a capacitance is examined theoretically and experimentally. Loading the input and/or the output lines of a distributed amplifier with this circuit reduces the signal losses, leading to an increase in the allowed number of active devices with a consequent increase in the gain-bandwidth and gain-maximum-frequency products. The cascode circuit, a related loss reduction network, is also evaluated because of its use in distributed amplifiers. Several designs employing the common-gate FET loss-compensating circuit and/or the cascode amplifying circuit are compared to a conventional distributed amplifier optimized for gain-bandwidth product. Simulated gain-maximum-operating frequency product increases of 27% to 245% over that of the optimized conventional distributed amplifier are shown. The increase in single-stage amplifier gain provided by this technique often results in (proportionally) higher maximum output power View full abstract»

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  • Design concepts for microwave GaAs FET active filters

    Publication Year: 1989 , Page(s): 1418 - 1424
    Cited by:  Papers (40)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (656 KB)  

    A comprehensive history of microwave active filter development to date is given. A design methodology is presented for the realization of precision broadband filters in the face of problems such as the nonideal behavior of microwave GaAs FETs and the low Q and related parasitic effects of monolithic-microwave-integrated-circuit (MMIC) inductors and capacitors. The feasibility of this approach is illustrated by the computer-simulated design of a cascadable, second-order microwave bandpass filter View full abstract»

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  • A 50 GHz GaAs FET MIC transmitter/receiver using hermetic miniature probe transitions

    Publication Year: 1989 , Page(s): 1434 - 1441
    Cited by:  Papers (6)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (648 KB)  

    A very compact 50-GHz-band transmitter/receiver for a video link is described. The RF assemblies used in the system consist of 25/50-GHz frequency doublers, a 25-GHz dielectric-resonator oscillator, and a 25-GHz FM modulator. The circuits make extensive use of microwave integrated circuit (MIC) technology with all GaAs FETs as active elements. The frequency doublers exhibit a minimum conversion loss of 2.6 dB and a maximum output power of 11 dBm. The modulator is highly frequency stabilized by the dielectric resonator. Recently developed miniature probe microstrip-to-waveguide transitions permit the MIC assemblies to be installed compactly in hermetically sealed packages. Design considerations and experimental data for the transition are presented. Using these technologies a transmitting power of 10 dBm and a receiver noise figure of 13 dB have been obtained View full abstract»

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  • Class-B power MMIC amplifiers with 70 percent power-added efficiency

    Publication Year: 1989 , Page(s): 1315 - 1320
    Cited by:  Papers (22)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (496 KB)  

    C-band monolithic amplifiers using high-efficiency, refractory metal, multifunction-self-aligned-gate (MSAG) processing have been designed, fabricated, and tested. The class-B single-ended amplifier design uses reactive termination for higher order harmonics and achieves a power-added efficiency (PAE) of 70% with associated gain of 8 dB and output power of 1.7 W over the 5-6-GHz band. Power output, gain, and PAE are discussed as a function of input power, drain-source voltage, and gain-source voltage, and data on noise figure, AM-to-PM conversion, and second- and third-harmonic generation are included. The monolithic microwave integrated circuits (MMICs) exhibited excellent performance including -26 and -28 dBc second- and third-harmonic levels, respectively, at the maximum efficiency, clearly demonstrating the importance of careful harmonic termination View full abstract»

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  • A linear statistical FET model using principal component analysis

    Publication Year: 1989 , Page(s): 1389 - 1394
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (448 KB)  

    An important issue in statistical circuit design, other than the algorithms themselves, is the development of efficient, statistically valid element models. The authors first discuss what features are needed for a good statistical model. The standard FET model is shown to be difficult to use in a statistical simulation, due to the nonlinear relation between FET S-parameters and model parameters. A linear statistical FET model is then proposed that is based on principal component analysis. This linear model gives uncorrelated model parameters. In an example using measured S-parameter data from ninety 0.5-μm GaAs FETs, 13 uncorrelated model parameters were needed to model the data from 1 to 11 GHz and at one bias. Simulation using this linear model and issues relating to bias are discussed View full abstract»

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  • A large-signal HSPICE model for the heterojunction bipolar transistor

    Publication Year: 1989 , Page(s): 1472 - 1475
    Cited by:  Papers (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (300 KB)  

    The development of an accurate nonlinear HSPICE model for a 3-×10-μm2 heterojunction bipolar transistor (HBT) is described. The model allows the simulation of nonlinear measurements such as gain at the 1-dB compression point (P1 dB) and third-order intercept point. Experimental data characterizing an HBT at 12.5 GHz are presented, demonstrating the validity of the model for MMIC chip designs View full abstract»

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  • Distributed numerical modeling of dual-gate GaAs MESFETs

    Publication Year: 1989 , Page(s): 1351 - 1360
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (784 KB)  

    A one-dimensional, numerical gradual channel model is used to examine the behavior of dual-gate GaAs metal-semiconductor field-effect transistors (MESFETs). Distributed numerical models for dual-gate devices do not incur any significant changes over equivalent single-gate device models. Such distributed numerical models are very useful for examining the regions of operation of each channel and the internal field distributions, and they are applicable when the close proximity of the two gates couples the parameters of the individual channels and invalidates the modeling of the device as two channels in series. The author first derives simplified conditions for saturation and nonsaturation of each gated channel, using as a basis the series connection of two single-gate devices. This load-line approach has been found to be very useful for analyzing switching as well as RF bias conditions. Then the model and method used in a numerical gradual channel analysis of the dual-gate FET are described. The results of the analysis are presented and discussed View full abstract»

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  • Lumped lossy circuit synthesis and its application in broad-band FET amplifier design in MMICs

    Publication Year: 1989 , Page(s): 1488 - 1491
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (292 KB)  

    A lumped lossy circuit is synthesized by means of the transformation introduced by L. Zhu et al. (ibid., vol.36, no.12, p.1614-20, Dec. 1988). The circuit contains two different kinds of lossy branches that include arbitrary nonuniform reactive resistors as well as lossy inductors and capacitors. This approach can be used to synthesize a lumped lossy matching network more flexibly than previous techniques. An example is presented to show the application of the synthesis of the lumped lossy matching networks for compensating the device gain roll-off with frequency in the design of a broadband monolithic microwave integrated FET amplifier. The advantages of the technique are seen by comparison with the amplifier designed by Zhu et al View full abstract»

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  • Minimization of intermodulation distortion in GaAs MESFET small-signal amplifiers

    Publication Year: 1989 , Page(s): 1411 - 1417
    Cited by:  Papers (27)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (536 KB)  

    It is shown how the intermodulation (IM) distortion performance of a small-signal amplifier can be optimized when the amplifier is designed according to available-gain criteria. In this process the MESFET's output is conjugate-matched and its input is mismatched to obtain a specified gain. This method generally results in a better dynamic range than obtained with other options such as matching the input and mismatching the output or simultaneously matching both the input and output (which, in many cases, is impossible). In available-gain design the value of source impedance that provides the desired gain is not unique and can be selected to optimize IM levels. A numerical formulation of the Volterra series allows a complete equivalent circuit of the FET to be used, and the intermodulation calculations include all feedback effects. The sensitivity of the IM intercept point (IP3 ) to the source-reflection coefficient, Γs, is shown to decrease with increasing frequency and is related to the MESFET's stability View full abstract»

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  • A new self-alignment technology for sub-quarter-micron-gate FETs operating in the Ka-band

    Publication Year: 1989 , Page(s): 1466 - 1471
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (480 KB)  

    A self-alignment technology is proposed that allows fabrication of gates of less than 100 nm using conventional optical lithography. An offset gate structure is realized using this method. The technology is applied to high-power GaAs MESFETs consisting of many individual FETs. The uniformity of the FET characteristics is checked to show reproducibility. The input-output power characteristics of a MESFET with a 3.6-mm gate width were measured at 28 GHz. A linear gain of 4.0 dB and a saturation power of 0.8 W were obtained, demonstrating the overall effectiveness of this technology. It is shown that a 50-nm gate can be fabricated with this technology. A MESFET with a 90-nm gate length that was fabricated and evaluated at high frequency to demonstrate the technology is discussed View full abstract»

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  • Modeling of noise parameters of MESFETs and MODFETs and their frequency and temperature dependence

    Publication Year: 1989 , Page(s): 1340 - 1350
    Cited by:  Papers (292)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (832 KB)  

    A simple noise model of a microwave MESFET (MODFET, HEMT, etc.) is described and verified at room and cryogenic temperatures. Closed-form expressions for the minimum noise temperature, the optimum generator impedance, the noise conductance, and the generator-impedance-minimizing noise measure are given in terms of the frequency, the elements of a FET equivalent circuit, and the equivalent temperatures of intrinsic gate resistance and drain conductance to be determined from noise measurements. These equivalent temperatures are demonstrated in the case of a Fujitsu FHR01FH MODFET to be independent of frequency in the frequency range in which 1/f noise is negligible. Thus, the model allows prediction of noise parameters for a broad frequency range from a single frequency noise parameter measurement. The relationships between this approach and other relevant studies are established View full abstract»

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The IEEE Transactions on Microwave Theory and Techniques focuses on that part of engineering and theory associated with microwave/millimeter-wave components, devices, circuits, and systems involving the generation, modulation, demodulation, control, transmission, and detection of microwave signals. This includes scientific, technical, and industrial, activities. Microwave theory and techniques relates to electromagnetic waves usually in the frequency region between a few MHz and a THz; other spectral regions and wave types are included within the scope of the Society whenever basic microwave theory and techniques can yield useful results. Generally, this occurs in the theory of wave propagation in structures with dimensions comparable to a wavelength, and in the related techniques for analysis and design..

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