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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue 6 • Date June 1997

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Displaying Results 1 - 9 of 9
  • Comments on "FPAD: a fuzzy nonlinear programming approach to analog circuit design"

    Publication Year: 1997
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (17 KB)

    A claim made in the above paper about single-objective optimization problem formulations is discussed. It is argued that a single-objective optimization problem formulation is not inherently restrictive, and can be treated as a solution method for a multiobjective formulation. View full abstract»

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  • Planar topological routing

    Publication Year: 1997, Page(s):651 - 656
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (168 KB)

    We develop a simple linear time algorithm to determine if a collection of two-pin nets can be routed, topologically, in a plane (i.e., single layer). Experiments indicate that this algorithm is faster than the linear time algorithm of Marek-Sadowska and Tarng. Topological routability testing of a collection of multipin nets is shown to be equivalent to planarity testing, and a simple linear time a... View full abstract»

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  • Postlayout logic restructuring using alternative wires

    Publication Year: 1997, Page(s):587 - 596
    Cited by:  Papers (34)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB)

    In this paper, we propose a layout-driven synthesis approach for field programmable gate arrays (FPGA's). The approach attempts to identify alternative wires and alternative functions for wires that cannot be routed due to the limited routing resources in FPGA. The alternative wires (in the logic level) that can be routed through less congested areas substitute the unroutable wires without changin... View full abstract»

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  • Module implementation selection and its application to transistor placement

    Publication Year: 1997, Page(s):645 - 651
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (308 KB)

    In this paper, we present an algorithm for selecting implementations for rectangular modules given a placement of the modules in multiple rows. A module is a rectangle with pins located on the top and the bottom edges. An implementation of a module is specified by its dimension and a placement of the pins along the top and bottom edges of the module. Our algorithm accepts as input a placement of t... View full abstract»

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  • Timing-driven placement for regular architectures

    Publication Year: 1997, Page(s):597 - 608
    Cited by:  Papers (1)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    We present a new iterative algorithm for timing-driven placement applicable to regular architectures such as field-programmable gate arrays (FPGAs). Our algorithm has two phases in each iteration: a compression phase and a relaxation phase. We employ a novel compression strategy based on the longest path tree of a cone for improving the timing performance of a given placement. Compression might ca... View full abstract»

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  • Logic emulation with virtual wires

    Publication Year: 1997, Page(s):609 - 626
    Cited by:  Papers (59)  |  Patents (36)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (520 KB)

    Logic emulation enables designers to functionally verify complex integrated circuits prior to chip fabrication. However, traditional FPGA-based logic emulators have poor inter-chip communication bandwidth, commonly limiting gate utilization to less than 20%. Global routing contention mandates the use of expensive crossbar and PC-board technology in a system of otherwise low-cost commodity parts. E... View full abstract»

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  • Micromachined polysilicon power dissipation: simulation and experiment

    Publication Year: 1997, Page(s):627 - 637
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (392 KB)

    In this paper, we present and implement a novel procedure for the accurate simulation of the thermoelectric effects which determine micromachined structures' behavior. This approach is simple to discretize, with rapid numerical convergence properties, and it yields results which are in very good agreement with experimental observations. We employ this procedure in particular to calculate P1AT... View full abstract»

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  • Microarchitectural synthesis for rapid BIST testing

    Publication Year: 1997, Page(s):573 - 586
    Cited by:  Papers (18)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (244 KB)

    The impact of testability on design cost necessitates its consideration during the earliest stages of synthesis. Built-in self test (BIST) is an accepted testing approach, but its application to many designs is limited by the long test application time required to achieve high fault coverage. This work addresses the problem of BIST test time for high fault coverage by targeting test concurrency du... View full abstract»

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  • Newton-Raphson iteration speed-up algorithm for the solution of nonlinear circuit equations in general-purpose CAD programs

    Publication Year: 1997, Page(s):638 - 644
    Cited by:  Papers (11)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB)

    The Newton-Raphson method is usually adopted for the solution of nonlinear circuit equations. However, it is well known that convergence of Newton's scheme is highly dependent on the initial guess, and often fails when convenient modifications are lacking. Typical Newton convergence problems in electronic circuits analysis are identified. An algorithm speeding up the convergence of the Newton sche... View full abstract»

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Aims & Scope

The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components.

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Meet Our Editors

Editor-in-Chief

VIJAYKRISHNAN NARAYANAN
Pennsylvania State University
Dept. of Computer Science. and Engineering
354D IST Building
University Park, PA 16802, USA
vijay@cse.psu.edu