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IEEE Design & Test of Computers

Issue 3 • July-Sept. 1997

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Displaying Results 1 - 16 of 16
  • Design And Test Economics - an Extra Dimension

    Publication Year: 1997, Page(s):15 - 16
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (209 KB)

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  • IC failure analysis: magic, mystery, and science

    Publication Year: 1997, Page(s):59 - 69
    Cited by:  Papers (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (871 KB)

    Advancing IC and packaging technologies motivate and direct the future of failure analysis. The authors review current tools and techniques and discuss challenges and opportunities created by the industry's critical need for new diagnosis and failure analysis paradigms. View full abstract»

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  • Built-in self-test for designers

    Publication Year: 1997, Page(s):113 - 121
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (341 KB)

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  • Incorporating cost modeling in embedded-system design

    Publication Year: 1997, Page(s):24 - 35
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (240 KB)

    The emergence of multimedia and wireless applications as growth leaders has created an increased demand for embedded systems. Examples of such applications range from digital cellular telephones to high-performance avionics systems. Along with the increased market share of these products, however, has come an increase in system complexity and cost. For example, the complexity of embedded avionics ... View full abstract»

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  • Automated diagnosis in testing and failure analysis

    Publication Year: 1997, Page(s):83 - 89
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (512 KB)

    To meet market demands for the rapid introduction of new semiconductor products, automated means of diagnosing defective silicon are fast becoming mandatory. The authors describe the development and deployment of an automated diagnosis methodology within Texas Instruments View full abstract»

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  • A BIST and boundary-scan economics framework

    Publication Year: 1997, Page(s):17 - 23
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (212 KB)

    IC level built-in self-test and IEEE 1149.1 boundary-scan architecture offer potential benefits at all phases of a product's life cycle: development, manufacturing, and field deployment. During early model debugging, for example, boundary scan rapidly flushes out structural defects such as solder bridges or opens. During manufacturing test, BIST and boundary scan can improve coverage, reduce test ... View full abstract»

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  • Cost-driven ranking of memory elements for partial intrusion

    Publication Year: 1997, Page(s):45 - 50
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (176 KB)

    DFT techniques such as scan, BIST, or test point insertion intrude the circuitry for ease of testing. However, testing ease incurs increased silicon area requirements and performance penalities. The authors present a method of identifying cost-effect intermediate solutions View full abstract»

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  • The economics of system-level testing

    Publication Year: 1997, Page(s):51 - 58
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (180 KB)

    Competitive pressure to streamline system-level test without affecting product quality is mounting. Identifying the features unique to system-level testing, the authors present key results of production testing based on a new test cost model View full abstract»

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  • Test economics in the 2lst Century

    Publication Year: 1997, Page(s):41 - 44
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (124 KB)

    Although it is clearly risky to make predictions about what may occur several years in the future, sometimes such projections are necessary. If we have no idea where we are heading and why, the journey may be fraught with even more pitfalls than the constantly changing environment we live in today. And, although change is a constant, some things will stay the same as they have over the last decade... View full abstract»

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  • Modeling the unmodelable: algorithmic fault diagnosis

    Publication Year: 1997, Page(s):98 - 103
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (148 KB)

    Because defect behavior is so variable, a fault model always leaves some faults unmodeled. One solution is to use improved matching algorithms to diagnose complex behaviors even with inaccurate modeling View full abstract»

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  • IC failure analysis: the importance of test and diagnostics

    Publication Year: 1997, Page(s):76 - 82
    Cited by:  Papers (26)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1112 KB)

    Continuous improvements in yield, reliability, time to market, and customer satisfaction all benefit from quick corrective action through root-cause failure analysis. The author reviews software- and hardware-based diagnostic methods for fault localization, the first and most critical step in this process View full abstract»

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  • The future of test and DFT

    Publication Year: 1997, Page(s):11 - 14
    Cited by:  Papers (13)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (280 KB)

    Advances in design characteristics and design processes are creating significant challenges to design for testability (DFT) and test. Are DFT and test capabilities developing at a pace that will not limit the rapid growth of the very large semiconductor and computing industries that rely on their capabilities? To answer this question, we must understand the alignment between two fundamental sets o... View full abstract»

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  • Analyzing manufacturing test costs

    Publication Year: 1997, Page(s):36 - 40
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (156 KB)

    We can think of the rapidly growing electronics manufacturing services (EMS) industry as an electronics manufacturing supermarket. Like their food store counterparts, EMS providers are usually geographically convenient to their major customers, original equipment manufacturers (OEMs). They provide a smorgasbord of goods and services ranging from circuit design through final product assembly and sh... View full abstract»

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  • Shmoo plotting: the black art of IC testing

    Publication Year: 1997, Page(s):90 - 97
    Cited by:  Papers (24)  |  Patents (50)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (640 KB)

    Obtaining higher yields from IC fabrication is a never ending goal. Toward that end, shmoo plotting can help bridge the gap between design and test and ultimately show ways to improve a product, process, or manufacturing test program View full abstract»

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  • Microprocessor architecture design with ATLAS

    Publication Year: 1997, Page(s):104 - 112
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (184 KB)

    A concrete example of special purpose microprocessor development demonstrates how this simulation and analysis package facilitates the early stages of design. Simulation data enable the designer to improve performance quickly and easily with less probability of error View full abstract»

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  • Diagnosing IC failures in a fast environment

    Publication Year: 1997, Page(s):70 - 75
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (868 KB)

    In today's world of fast product introductions, short product life cycles, and complex ICs, manufacturers need comprehensive, accurate, and fast diagnosis of development failures and reliability hazards before launching a product. As a result, the failure analyst's role has changed from reactive to proactive. Waiting until failures come back from the field to assess the reliability of a product is... View full abstract»

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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty