IEE Proceedings - Circuits, Devices and Systems

Issue 3 • Jun 1997

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Displaying Results 1 - 11 of 11
  • Diagnosis of multifaults in analogue circuits using multilayer perceptrons

    Publication Year: 1997, Page(s):149 - 154
    Cited by:  Papers (15)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (652 KB)

    It is shown, by means of an example, how multiple faults in bipolar analogue integrated circuits can be diagnosed, and their resistances determined, from the magnitudes of the Fourier harmonics in the spectrum of the circuit responses to a sinusoidal input test signal using a two-stage multilayer perceptron (MLP) artificial neural network arrangement to classify the responses to the corresponding ... View full abstract»

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  • On-chip memory module designs for video-signal processing

    Publication Year: 1997, Page(s):138 - 144
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (652 KB)

    Two embedded memory designs are proposed for video-signal processing. Concurrent line access performs multiple-port memory accesses at the hardware cost and access time of a single port. It uses 62.24% of the area required by a conventional dual-port memory and is only 7.6% larger than a single-port 2K×8 memory. The block-access mode combines address decoders and generators, yielding block-a... View full abstract»

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  • Digital sinusoidal oscillator with low and uniform frequency spacing

    Publication Year: 1997, Page(s):185 - 189
    Cited by:  Papers (7)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (396 KB)

    An extremely low-frequency digital sinusoidal oscillator is proposed and its performance is evaluated. The proposed oscillator structure can generate sinusoidal signals with a large number of samples per cycle without the need for increasing the width of the multiplier coefficient. The difference between two adjacent generated frequencies is shown to be approximately constant over the frequency ra... View full abstract»

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  • March U: a test for unlinked memory faults

    Publication Year: 1997, Page(s):155 - 160
    Cited by:  Papers (24)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (640 KB)

    Short and efficient memory tests is the goal of every test designer. To reduce the cost of production tests, often a simple test which covers most of the faults, e.g. all simple (unlinked) faults, is desirable to eliminate most defective parts; a more costly test can be used thereafter to eliminate the remainder of the bad parts. Such a test-cost efficient approach is used by most manufacturers. I... View full abstract»

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  • Collective process circuit that sorts

    Publication Year: 1997, Page(s):145 - 148
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (364 KB)

    Comparing and sorting are common functions in natural and artificial systems. Many known algorithms that sort m numbers require time from O(m2) to O(m). Algorithms to find the greatest number have been realised in neural networks and discrete time systems. Presented in the paper is a new circuit, the MAXOR, which incorporates a continuous time recursive collective process for finding th... View full abstract»

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  • Systolic implementation of higher-order CMAC and its application in colour calibration

    Publication Year: 1997, Page(s):129 - 137
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (932 KB)

    The primary advantages of a CMAC neural network are fast learning and insensitivity to the order in which training patterns are presented. The authors present an extended direct weight cell address mapping mechanism based on a linear systolic array architecture to realise a higher-order CMAC neural network with digital hardware. This higher-order CMAC implementation has been applied to calibrate a... View full abstract»

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  • Performance-driven macro-block placer for architectural evaluation of ASIC designs

    Publication Year: 1997, Page(s):190 - 194
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (440 KB)

    The authors present a tool for generating a performance-driven placement from a netlist of register-transfer level (RTL) blocks. Based on the modified force-directed algorithm, the tool chooses locations and orientations of the blocks in such a way as to produce a compact area placement with minimum wiring delay along the critical path. Experiments show that the tool provides solutions close to th... View full abstract»

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  • Assessment of active microwave inductors

    Publication Year: 1997, Page(s):161 - 166
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (528 KB)

    The active inductors proposed by Zhang, Hara, Khoury and Kaunisto are assessed for their suitability for microwave filtering applications. Versions of these circuits utilising a cascode arrangement as a means of improving the resistance of the circuits are also considered. The assessment considers such issues as inductance, resistance, frequency range, power consumption and device requirements View full abstract»

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  • Novel CMOS differential voltage current conveyor and its applications

    Publication Year: 1997, Page(s):195 - 200
    Cited by:  Papers (103)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (448 KB)

    Novel CMOS realisations of a differential voltage current conveyor (DVCC) are described. These circuits are powerful building blocks, especially for applications demanding differential or floating inputs like impedance converter circuits and current mode instrumentation amplifiers. Applications suitable for VLSI are then considered by using the DVCC to realise a MOS transconductor and a continuous... View full abstract»

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  • Hierarchical techniques for symbolic analysis of electronic circuits

    Publication Year: 1997, Page(s):167 - 177
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (928 KB)

    A hierarchical symbolic analyser (SAGA2) is presented for the analysis of electronic circuits. SAGA2 analyses lumped, linear, or linearised (small-signal) circuits in the S- and Z-domain. For the analysis of large circuits, a hierarchical two-port (multiport) method is proposed that is two to three orders faster than that without using the hierarchical method. A bandpass filter or a 12-stage RC la... View full abstract»

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  • Noninteracting electronically tunable CCII-based current-mode biquadratic filters

    Publication Year: 1997, Page(s):178 - 184
    Cited by:  Papers (13)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (592 KB)

    A complete state variable biquadratic filter built by CCIIs with variable current gain is presented and analysed. All the coefficients of the filter can be independently tuned through the variable current gain factors of the current conveyors. The authors propose fundamental techniques for the circuit implementation of the filter from the state variable block diagram. Design criteria to minimise t... View full abstract»

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Aims & Scope

Published from 1994-2006, IEE Proceedings - Circuits, Devices and Systems contained significant and original contributions on electronic circuits, solid-state electronic devices and systems. It covered the following topics: circuit theory and design, circuit analysis and simulation; CAD; filters; circuit implementations; cells and architectures for integration including VLSI; testability, fault-tolerant design, minimisation of circuits; electronic devices for technologies including nanoelectronics and MEMs; device and process characterisation; device parameter extraction schemes; the mathematics of circuits and systems theory; and testing and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers.

Full Aims & Scope