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IEEE Transactions on Computers

Issue 2 • Feb. 1997

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Displaying Results 1 - 18 of 18
  • Boolean functions classification via fixed polarity Reed-Muller forms

    Publication Year: 1997, Page(s):173 - 186
    Cited by:  Papers (31)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (187 KB)

    In this paper, we present a new method to characterize completely specified Boolean functions. The central theme of the classification is the functional equivalence (a.k.a. Boolean matching). Two Boolean functions are equivalent if there exists input permutation, input negation, or output negation that can transform one function to the other. We have derived a method that can efficiently identify ... View full abstract»

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  • Cohorts structures for fault-tolerant k entries to a critical section

    Publication Year: 1997, Page(s):222 - 228
    Cited by:  Papers (23)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (112 KB)

    We propose a structure named Cohorts to solve the problem of the access control of multiple entries to a critical section. Our solution is formalized as forming quorums in a k-coterie. It is resilient to node failures and/or network partitioning, invokes constant expected message cost and has comparably high availability View full abstract»

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  • Optimal release times for software systems with scheduled delivery time based on the HGDM

    Publication Year: 1997, Page(s):216 - 221
    Cited by:  Papers (26)  |  Patents (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (112 KB)

    The Hyper-Geometric Distribution software reliability growth Model (HGDM) was developed to estimate the number of remaining software faults after completing the test/debug phase. An important problem in the software development process is to determine when to stop testing and release the software to the users. In this paper, the cost optimal release policy, which minimizes the total expected softw... View full abstract»

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  • Decoupled sectored caches

    Publication Year: 1997, Page(s):210 - 215
    Cited by:  Papers (4)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (96 KB)

    Maintaining a low tag array size is a major issue in many cache designs. In the decoupled sectored cache, we present in this paper, the monolithic association between a cache block and a tag location is broken; the address tag location associated with a cache line location is dynamically chosen at fetch time among several possible locations. The hit ratio for a decoupled sectored cache is very clo... View full abstract»

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  • Maximizing mean-time to failure in k-resilient systems with repair

    Publication Year: 1997, Page(s):229 - 234
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (140 KB)

    A k-resilient system with N components can tolerate up to k component failures and still function correctly. We consider k-resilient systems where the number of component failures is a constant fraction of the total number of components, that is k=N/c and c is a constant such that 2⩽c<∞. Under a Markovian assumption of constant failure and repair rates, we compute the system size N View full abstract»

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  • A fast binary adder with conditional carry generation

    Publication Year: 1997, Page(s):248 - 253
    Cited by:  Papers (12)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (360 KB)

    This paper presents a fast binary adder in static CMOS realization. While the carry derivation is similar to that in a conditional-sum adder, the proposed adder is also similar to that of a spanning tree carry lookahead adder in the sense that only selected carry bits are generated and the sum bits are produced by carry-select adders. In a 1.2 μm static CMOS realization, the proposed adder adds... View full abstract»

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  • Generating De Bruijn sequences: an efficient implementation

    Publication Year: 1997, Page(s):198 - 200
    Cited by:  Papers (27)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (128 KB)

    This paper presents a concise and efficient implementation of a method of producing De Bruijn sequences. The implementation is based on a recursive method due to A. Lempel (1970). We provide code for a function that for each pair of integers n⩾2 and 0⩽x<2n-2 returns a unique De Bruijn sequence of order-n. The implementation requires only O(2n) bit operations View full abstract»

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  • The design of an optoelectronic arithmetic processor based on permutation networks

    Publication Year: 1997, Page(s):142 - 153
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1208 KB)

    This paper introduces a new concept by which it is possible to design and implement arithmetic processors using permutation networks. To demonstrate this concept, several optoelectronic arithmetic units combining optical directional coupler switches and cyclic permutation networks are designed. The designs show that addition, subtraction, and multiplication can all be performed in O(log n) time in... View full abstract»

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  • Distributed ring embedding in faulty De Bruijn networks

    Publication Year: 1997, Page(s):187 - 190
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (116 KB)

    We present a distributed network-level algorithm that constructs a cycle in a d-ary De Bruijn multiprocessor network in the presence of an arbitrary number of node failures. When the number of faults f does not exceed d-1 a cycle of length at least dn-nf-1 can always be found in O(n) steps in a network of size dn View full abstract»

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  • Reliable unicasting in faulty hypercubes using safety levels

    Publication Year: 1997, Page(s):241 - 247
    Cited by:  Papers (42)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (156 KB)

    We propose a unicasting algorithm for faulty hypercubes (including disconnected hypercubes) using the safety level concept. A faulty hypercube is a hypercube with faulty nodes and unicasting is a one-to-one communication between two nodes in the hypercube. Each node is associated with a safety level which is an approximated measure of the number and distribution of faulty nodes in the neighborhood... View full abstract»

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  • Complexity analysis of the cost-table approach to the design of multiple-valued logic circuits

    Publication Year: 1997, Page(s):205 - 209
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (132 KB)

    We analyze the computational complexity of the cost-table approach to designing multiple-valued logic circuits that is applicable to I2L, CCDs, current-mode CMOS, and RTDs. We show that this approach is NP-complete. An efficient algorithm is shown for finding the exact minimal realization of a given function by a given cost-table View full abstract»

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  • Space/time trade-offs for higher radix modular multiplication using repeated addition

    Publication Year: 1997, Page(s):139 - 141
    Cited by:  Papers (18)  |  Patents (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (56 KB)

    The value of using a higher radix for modular multiplication in the context of RSA is investigated. The main conclusion is that for algorithms which perform the multiplication via repeated addition, there is, broadly speaking, a direct trade-off between space and time provided by change of radix. Thus chip area utilized is roughly proportional to speed. However, initially, as the radix is increase... View full abstract»

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  • On variable scope of parity protection in disk arrays

    Publication Year: 1997, Page(s):234 - 240
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (100 KB)

    In a common form of a RAID 5 architecture, data is organized on a disk array consisting of N+1 disks into stripes of N data blocks and one parity block (with parity block locations staggered so as to balance the number of parity blocks on each disk). This allows data to be recovered in the event of a single disk failure. Here we consider an extension to this architecture in which parity informatio... View full abstract»

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  • Globally optimal diagnosis in systems with random faults

    Publication Year: 1997, Page(s):200 - 204
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    We consider probabilistic diagnosis in multiprocessor systems. Processors can test one another; fault-free processors give correct test results, while faulty testers are unpredictable. Processors fail independently with constant probability p<1/2 and the goal is to identify correctly the status of all processors, based on the set of test results. A diagnosis algorithm is globally optimal if it ... View full abstract»

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  • Design issues in division and other floating-point operations

    Publication Year: 1997, Page(s):154 - 161
    Cited by:  Papers (91)  |  Patents (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (148 KB)

    Floating-point division is generally regarded as a low frequency, high latency operation in typical floating-point applications. However, in the worst case, a high latency hardware floating-point divider can contribute an additional 0.50 CPI to a system executing SPECfp92 applications. This paper presents the system performance impact of floating-point division latency for varying instruction issu... View full abstract»

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  • A traffic-balanced adaptive wormhole routing scheme for two-dimensional meshes

    Publication Year: 1997, Page(s):190 - 197
    Cited by:  Papers (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (980 KB)

    In this paper, we analyze several issues involved in developing low latency adaptive wormhole routing schemes for two-dimensional meshes. It is observed that along with adaptivity, balanced distribution of traffic has a significant impact on the system performance. Motivated by this observation, we develop a new fully adaptive routing algorithm called positive-first-negative-first for two-dimensio... View full abstract»

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  • A residue arithmetic extension for reliable scientific computation

    Publication Year: 1997, Page(s):129 - 138
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (188 KB)

    A reliable scientific computation approach, substantially different from the known ones, based on Residue Number System (RNS) floating-point arithmetic is described. In the approach, the real number is represented by an expression which consists of two parts, the approximate part and the interval error part. The approximate part, represented by an RNS floating-point number, shows an approximate va... View full abstract»

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  • Efficient exponentiation of a primitive root in GF(2m)

    Publication Year: 1997, Page(s):162 - 172
    Cited by:  Papers (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (192 KB)

    In this paper, exponentiation of a primitive root in GF(2m ) is considered. Signed digit (SD) number representation is used to efficiently represent the exponent and the corresponding algorithms and structures for exponentiation are developed. For primitive multiplications required in exponentiations, extended bidirectional linear feedback shift registers are proposed and used for the c... View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org