IEEE Transactions on Computers

Issue 12 • Dec. 1996

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Displaying Results 1 - 13 of 13
  • 1996 Index IEEE Transactions on Computers Vol. 45

    Publication Year: 1996
    Request permission for commercial reuse | |PDF file iconPDF (1952 KB)
    Freely Available from IEEE
  • Suggestion for a new representation for binary function

    Publication Year: 1996, Page(s):1445 - 1449
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (376 KB)

    The widely used method for Boolean function representation, called binary decision diagram (BDD), and its variation, the ordered binary decision diagram (OBDD), occasionally become time and space consuming for efficient manipulations with increase of number of its input variables. It would appear intuitively that a more efficient approach can be derived by viewing the function from the perspective... View full abstract»

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  • Optimal data scheduling for uniform multidimensional applications

    Publication Year: 1996, Page(s):1439 - 1444
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (652 KB)

    Uniform nested loops are broadly used in scientific and multidimensional digital signal processing applications. Due to the amount of data handled by such applications, on-chip memory is required to improve the data access and overall system performance. In this study a static data scheduling method, carrot-hole data scheduling, is proposed for multidimensional applications, in order to control th... View full abstract»

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  • Weighted diagnosis with asymmetric invalidation

    Publication Year: 1996, Page(s):1435 - 1438
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (420 KB)

    Prior research has extended the classical PMC (or Symmetric Invalidation) Model to incorporate a priori weights or probabilities associated with units. We consider a similar extension to the BGM (or Asymmetric Invalidation) Model. In contrast to the PMC model, where deciding the weighted diagnosability number is co-NP complete, we show that the diagnosability number in the weighted BGM model can b... View full abstract»

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  • Numerical similarity and dissimilarity measures between two trees

    Publication Year: 1996, Page(s):1426 - 1434
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (904 KB)

    Quantifying the measure of similarity between two trees is a problem of intrinsic importance in the study of algorithms and data structures and has applications in computational molecular biology, structural/syntactic pattern recognition and in data management. In this paper we define and formulate an abstract measure of comparison, Ω(T1, T2), between two trees T1<... View full abstract»

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  • Hardware starting approximation method and its application to the square root operation

    Publication Year: 1996, Page(s):1356 - 1369
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1288 KB)

    Quadratically converging algorithms for high-order arithmetic operations typically are accelerated by a starting approximation. The higher the precision of the starting approximation, the less number of iterations required for convergence. Traditional methods have used look-up tables or polynomial approximations, or a combination of the two called piecewise linear approximations. This paper provid... View full abstract»

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  • Generation of high quality tests for robustly untestable path delay faults

    Publication Year: 1996, Page(s):1379 - 1392
    Cited by:  Papers (35)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1456 KB)

    In many designs a large portion of path delay faults is not robustly testable. In this paper, we investigate testing strategies for robustly untestable faults. We show that the quality of nonrobust tests may be very poor in detecting small defects caused by manufacturing process variation. We demonstrate that better quality nonrobust tests can be obtained by including timing information into the p... View full abstract»

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  • Efficient fault location for globally controlled and comparison-based multistage interconnection networks

    Publication Year: 1996, Page(s):1420 - 1425
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (632 KB)

    Procedures for fault location in globally controlled and comparison-based multistage interconnection networks (MINs) are presented. The number of tests is constant or depends logarithmically on the network size. The tests are independent of the actual fault location and type which yields reduced time consumption and simple implementation. Furthermore, these procedures are well suited to be impleme... View full abstract»

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  • Fault-tolerant design of neural networks for solving optimization problems

    Publication Year: 1996, Page(s):1450 - 1455
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (504 KB)

    First, the incorporation of the alternative ways of representing the solution to the traveling salesman problem by neural network is proposed to deal with the asymmetric tolerance of neural networks to unidirectional faults. Next, in order to cope with the simultaneous occurrence of a s-a-0 and s-a-1 faults, the triplication scheme with a proper merging function is considered. Finally, the combina... View full abstract»

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  • A new approach to fixed-coefficient inner product computation over finite rings

    Publication Year: 1996, Page(s):1345 - 1355
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (936 KB)

    Inherently parallel arithmetic based on the residue number system (RNS) lends itself very well to implementation of high-speed digital signal processing (DSP) hardware. In most cases, DSP computations can be decomposed to the inner product form Y=Σi=0N-1 CiXi. Therefore, implementation of the inner product computation over finite rings is of paramo... View full abstract»

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  • A novel implementation of CORDIC algorithm using backward angle recoding (BAR)

    Publication Year: 1996, Page(s):1370 - 1378
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (832 KB)

    We propose a backward angle recoding (BAR) method to eliminate redundant CORDIC elementary rotations and hence expedite the CORDIC rotation computation. We prove that for each of the linear, circular, and hyperbolic CORDIC rotations, the use of BAR guarantees more than 50% reduction of elementary CORDIC rotations provided the scaling factor needs not be kept constant. The proposed BAR algorithm is... View full abstract»

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  • Programmable BIST space compactors

    Publication Year: 1996, Page(s):1393 - 1404
    Cited by:  Papers (30)  |  Patents (43)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1324 KB)

    We address test data compaction for built-in self-test (BIST). The thrust of the work focuses on BIST space compaction, a process increasingly required when a large number of internal circuit nodes need to be monitored during test but where area limitations preclude the association of observation latches for all the monitored nodes. We introduce a general class of space compactors denoted as progr... View full abstract»

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  • On the use of counters for reproducing deterministic test sets

    Publication Year: 1996, Page(s):1405 - 1419
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1520 KB)

    We propose a very simple and fast CAD tool to check whether a binary counter can reproduce a predetermined set of test patterns in a reasonable time. Given a test matrix T, the tool uses column merging, complementation, and permutation so that the distance between the starting and the finishing vector of the corresponding counter is minimized. The hardware overhead of the proposed approach is by f... View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org