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IEEE Design & Test of Computers

Issue 2 • Date Summer 1996

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Displaying Results 1 - 11 of 11
  • Road map to riches

    Publication Year: 1996
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (893 KB)

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  • Mixed Analog and Digital Systems

    Publication Year: 1996
    Cited by:  Papers (1)
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  • Deep Sub-micron Design

    Publication Year: 1996
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  • Facets of growth in the EDA market

    Publication Year: 1996, Page(s):5 - 6
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (216 KB)

    According to Dataquest, in 1995, EDA software revenue (excluding that from platforms, service, and maintenance) grew by 17.2%. In contrast, semiconductor revenues grew by 36%. Hence, despite impressive growth last year, if we use semiconductors as a surrogate for EDA buyers, EDA software revenue grew at only half the growth rate of its buyers. This is not a revelation but a consistent trend throug... View full abstract»

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  • Real-time current testing for A/D converters

    Publication Year: 1996, Page(s):34 - 41
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1568 KB)

    The author has revised current testing for analog circuits, examined his method for effective fault detection, and applied it to an A/D converter. This method measures the integral of the power supply current during one clock period in which a test vector is applied. Simulation results show effective detection of target faults in the CUT when applying a step voltage input and easier detection when... View full abstract»

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  • Desing and self-test for switched-current building blocks

    Publication Year: 1996, Page(s):10 - 17
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1048 KB)

    This switched-current memory cell with a built-in self-test option serves as a building block for a range of analog functions. As an example application, the authors present a divide-by-two circuit for reference signal generation in algorithmic A/D converters. They also describe two self-test approaches for these building blocks and evaluate their effectiveness. The self-test functions are easy to... View full abstract»

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  • FPGA and CPLD architectures: a tutorial

    Publication Year: 1996, Page(s):42 - 57
    Cited by:  Papers (144)  |  Patents (29)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3984 KB)

    This tutorial surveys commercially available, high-capacity field-programmable devices. The authors describe the three main categories of FPDs: simple and complex programmable logic devices, and field-programmable gate arrays. They then give architectural details of the most important chips and example applications of each type of device View full abstract»

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  • Analog testing with time response parameters

    Publication Year: 1996, Page(s):18 - 25
    Cited by:  Papers (37)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1680 KB)

    This paper describes a simple test generation technique which derives sinusoidal test waveforms that detect several fault classes. In addition, the authors show that certain stimuli will provoke variations in delay, rise time, and overshoot that indicate faulty behavior. Simple algorithms compute the different parameters View full abstract»

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  • Optimizing power in ASIC behavioral synthesis

    Publication Year: 1996, Page(s):58 - 70
    Cited by:  Papers (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3008 KB)

    Attacking power consumption at the behavioral level exploits an application's inherent parallelism to maintain performance while compensating for slower, less power-hungry operators. The authors' method and tool optimize and evaluate the effects of power-saving strategies on performance and silicon area View full abstract»

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  • DC built-in self-test for linear analog circuits

    Publication Year: 1996, Page(s):26 - 33
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1624 KB)

    DC testing of analog circuits is cheaper than AC testing and covers many fault classes, including some that AC tests cannot detect. This efficient, low-cost, built-in self-test (BIST) methodology uses the checksum encodings of matrix representations to uncover faults that affect a circuit's DC transfer function View full abstract»

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  • An integrated CAD environment for low-power design

    Publication Year: 1996, Page(s):72 - 82
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2052 KB)

    This CAD environment supports a high-level approach to power reduction, emphasizing optimizations at the algorithm and architecture levels of abstraction. An integrated set of analysis and optimization tools spans the design hierarchy, allowing the designer to make a systematic, top-down exploration and refinement of solutions in the area-time-power design space. In a case study-a low-power implem... View full abstract»

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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

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Editor-in-Chief
Krishnendu Chakrabarty