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IEEE Transactions on Parallel and Distributed Systems

Issue 3 • Mar 1996

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Displaying Results 1 - 10 of 10
  • Graph isomorphism and identification matrices: parallel algorithms

    Publication Year: 1996, Page(s):308 - 319
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1132 KB)

    In this paper, we explore some properties of identification matrices and exhibit some uses of identification matrices in studying the graph isomorphism problem, a famous open problem. We show that, given two graphs in the form of a certain identification matrix, isomorphism can be tested efficiently in parallel if at least one matrix satisfies the circular 1s property, and more efficiently in para... View full abstract»

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  • A note on consensus on dual failure modes

    Publication Year: 1996, Page(s):225 - 230
    Cited by:  Papers (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (544 KB)

    F.J. Meyer and D.K. Pradhan (1991) proposed the MS (for “mixed-sum”) algorithm to solve the Byzantine Agreement (BA) problem with dual failure modes: arbitrary faults (Byzantine faults) and dormant faults (essentially omission faults and timing faults). Our study indicates that this algorithm uses an inappropriate method to eliminate the effects of dormant faults and that the bound on ... View full abstract»

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  • An approximate analysis of the join the shortest queue (JSQ) policy

    Publication Year: 1996, Page(s):301 - 307
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    This paper presents an accurate analytical model for evaluating the performance of the join the shortest queue (JSQ) policy. The system considered consists of N identical queues each of which may have single or multiple servers. A birth-death Markov process is used to model the evolution of the number of jobs in the system. Our results show that this method provides very accurate estimates of the ... View full abstract»

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  • Optimal synthesis of algorithm-specific lower-dimensional processor arrays

    Publication Year: 1996, Page(s):274 - 287
    Cited by:  Papers (14)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1384 KB)

    Processor arrays are frequently used to deliver high performance in many applications with computationally intensive operations. This paper presents the general parameter method (GPM), a systematic parameter-based approach for synthesizing such algorithm-specific architectures. GPM can synthesize processor arrays of any lower dimension from a uniform-recurrence description of the algorithm. The de... View full abstract»

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  • Leader election in the presence of link failures

    Publication Year: 1996, Page(s):231 - 236
    Cited by:  Papers (24)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (536 KB)

    We study the problem of leader election in the presence of intermittent link failures. We assume that up to N/2-1 links incident on each node may fail during the execution of the protocol. We present a message optimal algorithm with message complexity O(N2) View full abstract»

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  • Dynamic partitioning of non-uniform structured workloads with spacefilling curves

    Publication Year: 1996, Page(s):288 - 300
    Cited by:  Papers (48)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1300 KB)

    We discuss inverse spacefilling partitioning (ISP), a partitioning strategy for non-uniform scientific computations running on distributed memory MIMD parallel computers. We consider the case of a dynamic workload distributed on a uniform mesh, and compare ISP against orthogonal recursive bisection (ORE) and a median of medians variant of ORE, ORB-MM. We present two results. First, ISP and ORB-MM ... View full abstract»

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  • Embedding and reconfiguration of binary trees in faulty hypercubes

    Publication Year: 1996, Page(s):237 - 245
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (884 KB)

    We consider the problem of embedding and reconfiguring binary tree structures in faulty hypercubes. We assume that the number of faulty nodes is at most (n-2), where n is the number of dimensions of the hypercube; we further assume that the location of faulty nodes are known. Our embedding techniques are based on a key concept called free dimension, which can be used to partition a cube into subcu... View full abstract»

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  • Circuit-switched broadcasting in torus networks

    Publication Year: 1996, Page(s):246 - 255
    Cited by:  Papers (32)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1328 KB)

    In this paper we present three broadcast algorithms and lower bounds on the three main components of the broadcast time for 2-dimensional torus networks (wrap-around meshes) that use synchronous circuit-switched routing. The first algorithm is based on a recursive tiling of a torus and is optimal in terms of both phases and intermediate switch settings when the start-up time to initiate message tr... View full abstract»

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  • On the design and implementation of broadcast and global combine operations using the postal model

    Publication Year: 1996, Page(s):256 - 265
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1000 KB)

    There are a number of models that were proposed in recent years for message passing parallel systems. Examples are the postal model and its generalization the LogP model. In the postal model a parameter λ is used to model the communication latency of the message-passing system. Each node during each round can send a fixed-size message and, simultaneously, receive a message of the same size.... View full abstract»

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  • An efficient dictionary machine using hexagonal processor arrays

    Publication Year: 1996, Page(s):266 - 273
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (704 KB)

    Dictionary machine is an important VLSI system performing high speed data archival operations. In this paper, we present a design which can efficiently implement dictionary machines in VLSI processor arrays. In order to effectively process the operations of dictionary machine, hexagonal mesh is selected as the host topology in which two different networks for update and query operation are embedde... View full abstract»

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Aims & Scope

IEEE Transactions on Parallel and Distributed Systems (TPDS) is published monthly. It publishes a range of papers, comments on previously published papers, and survey articles that deal with the parallel and distributed systems research areas of current importance to our readers. Particular areas of interest include, but are not limited to:

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Meet Our Editors

Editor-in-Chief
David Bader
College of Computing
Georgia Institute of Technology