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Computer

Issue 3 • Date March 1996

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Displaying Results 1 - 17 of 17
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  • DSPCard-C31: Development on a budget [Product Reviews]

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    Freely Available from IEEE
  • A new version of an old friend [Product Review Norton Utilities for Windows 95]

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    Freely Available from IEEE
  • Programming by contract

    Page(s): 109 - 111
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    "Why can't software be more like hardware?" has been the software engineer's lament for nearly as long as there have been large software systems. In particular, why isn't there a software components industry to rival the existing hardware components industry? Hardware components come with the following attributes: an interface that hides detail that would only confuse or at least distract me; an unambiguous interface specification written in a language I can understand (in the case of the integrated circuit, this may be a fairly complex language, but it's one I expect to learn if I'm going to work with that hardware); a guarantee-the component has been tested and/or validated against its specification. All three items-especially the last one-are notably lacking for software components. Indeed, software tends to come with an antiguarantee, otherwise known as a disclaimer. All of the above points rely on a rigorous specification of the hardware component's interface. In a nutshell, programming by contract is about providing just such specifications for software components (that is, classes), and it provides the best hope of a basis for a true software component industry. The discussion focuses on object oriented software. View full abstract»

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  • Conference program management using the Internet

    Page(s): 112 - 113
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    Freely Available from IEEE
  • Practicing "safe" engineering

    Page(s): 114 - 115
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (766 KB)  

    When an engineer teaches a computer science class at a university, and one of his students asks him to do some work for a company where he works, could this pose any legal problems? The 10-point IEEE Code of Ethics contained in the IEEE Policy and Procedures Manual outlines proper professional conduct for engineers. With that as a basis, this article presents a relevant case study. View full abstract»

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  • The big software chill

    Page(s): 12 - 14
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    If a technology (or idea) does not achieve mainstream status quickly enough, it dies. Video on demand (interactive TV), the information superhighway (ISDN), and massively parallel supercomputing may be examples. These ideas are okay, but they could die for lack of legs. At present, consumers are simply shunning them, illustrating the power of Information Age mainstreaming. A corollary to this law is that a technology (or idea) thrives, even if it is a bad technology or idea, as long as it quickly achieves mainstream status. Microsoft Windows, Java, C++ and others illustrate the overwhelming power of mainstreaming. It's positive feedback. Simply put, the rich get richer, especially when they hold a monopoly. In the Information Age, the definition of wealth includes domination of standards as well as having cash in the bank. The problem with software is that software companies don't get paid unless they reap a profit within the time limit set by the mainstreaming law. Commercial software companies have to hit the big time, or else View full abstract»

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  • Symbolic representation of neural networks

    Page(s): 71 - 77
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    Neural networks often surpass decision trees in predicting pattern classifications, but their predictions cannot be explained. This algorithm's symbolic representations make each prediction explicit and understandable. Our approach to understanding a neural network uses symbolic rules to represent the network decision process. The algorithm, NeuroRule, extracts these rules from a neural network. The network can be interpreted by the rules which, in general, preserve network accuracy and explain the prediction process. We based NeuroRule on a standard three layer feed forward network. NeuroRule consists of four phases. First, it builds a weight decay backpropagation network so that weights reflect the importance of the network's connections. Second, it prunes the network to remove irrelevant connections and units while maintaining the network's predictive accuracy. Third, it discretizes the hidden unit activation values by clustering. Finally, it extracts rules from the network with discretized hidden unit activation values View full abstract»

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  • Global optimization for neural network training

    Page(s): 45 - 54
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    We propose a novel global minimization method, called NOVEL (Nonlinear Optimization via External Lead), and demonstrate its superior performance on neural network learning problems. The goal is improved learning of application problems that achieves either smaller networks or less error prone networks of the same size. This training method combines global and local searches to find a good local minimum. In benchmark comparisons against the best global optimization algorithms, it demonstrates superior performance improvement View full abstract»

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  • Vietnam: information technology for the transition

    Page(s): 88 - 94
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    Can information technology spark socioeconomic progress in a poor and developing country? With its recently approved national IT plan, Vietnam is hoping the answer is yes. One of the first challenges for IT vendors is to provide systematic and integrated solutions for processing the unique national language, whose writing system is based on the Latin script. Solving this problem through localized systems and software will effectively expand the customer base, which is now restricted to those who are comfortable with English or French. Just like other countries at a similar stage of development and with analogous language requirements in a rapidly advancing information age, Vietnam needs an effective national standards framework View full abstract»

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  • Spert-II: a vector microprocessor system

    Page(s): 79 - 86
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    The Spert-II fixed point vector microprocessor system performs training and recall faster than commercial workstations for neural networks used in speech recognition research. We have packaged a prototype full custom vector microprocessor, TO, as the Spert-II (Synthetic Perceptron Testbed II) workstation accelerator system. We originally developed Spert-II to accelerate multiparameter neural network training for speech recognition research. Our speech research algorithms constantly change. Also, neural nets are often integrated with other tasks to form complete applications. We thus desired a general purpose, easily programmable accelerator that could speed up a range of tasks View full abstract»

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  • Artificial neural networks: a tutorial

    Page(s): 31 - 44
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    Artificial neural nets (ANNs) are massively parallel systems with large numbers of interconnected simple processors. The article discusses the motivations behind the development of ANNs and describes the basic biological neuron and the artificial computational model. It outlines network architectures and learning processes, and presents some of the most commonly used ANN models. It concludes with character recognition, a successful ANN application View full abstract»

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  • An artificial neural network that models human decision making

    Page(s): 64 - 70
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    The Neural Logic Network (Neulonet) system models a wide range of human decision making behaviors by combining the strengths of rule based expert systems and neural networks. Neulonet differs from other neural networks by having an ordered pair of numbers associated with each node and connection, as shown. Let Q be the output node and P1, P, …, PN, be input nodes. Also, let values associated with the node Pi, be denoted by (ai, bi,), and the weight for the connection from Pi, to Q be (αii,). Each node's ordered pair takes one of three values-(1,0) for true, (0,1) for false, or (0,0) for “don't know”; (1,1) is undefined View full abstract»

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  • Network security under siege: the timing attack

    Page(s): 95 - 97
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    Although most encryption algorithms are theoretically secure and remain impervious to even the most sophisticated cryptanalytic techniques, new attacks like the timing attack exploit the engineering side of network security. A timing attack is basically a way of deciphering a user's private key information by measuring the time it takes to carry out cryptographic operations. Factors such as branching and conditional statements, RAM cache hits, processor instructions that run in nonfixed time, as well as performance optimizations to bypass unnecessary operations, all contribute to predictability and therefore to the probability of key decryption View full abstract»

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  • Simulating artificial neural networks on parallel architectures

    Page(s): 56 - 63
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    Parallelization is necessary to cope with the high computational and communication demands of neuroapplications, but general purpose parallel machines soon reach performance limitations. The article explores two approaches: parallel simulation on general purpose computers, and simulation/emulation on neurohardware. Different parallelization methods are discussed, and the most popular techniques are explained. While the software approach looks for an optimal programming model for neural processing, the hardware approach tries to imitate the neuroparadigm using the best of silicon technology View full abstract»

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Computer, the flagship publication of the IEEE Computer Society, publishes highly acclaimed peer-reviewed articles written for and by professionals representing the full spectrum of computing technology from hardware to software and from current research to new applications.

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Editor-in-Chief
Ron Vetter
University of North Carolina
Wilmington