IEEE Transactions on Computers

Issue 11 • Nov. 1995

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Displaying Results 1 - 15 of 15
  • Comments on "Some additions to solution of switching equations based on a tabular algebra

    Publication Year: 1995, Page(s):1357 - 1358
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (159 KB)

    A method to complement the tables for Boolean equations was presented by S.H. Unger (see ibid., vol. 43, no. 3, pp. 591-596, 1994). The method was utilized to solve the equations of the general form. We present a way to perform Exclusive-OR operation between two tabular type Boolean expressions. The proposed method allows to solve the equations in a rather direct manner.<> View full abstract»

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  • Efficient totally self-checking checkers for a class of Borden codes

    Publication Year: 1995, Page(s):1318 - 1322
    Cited by:  Papers (7)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (428 KB)

    In this paper a new method to design totally self-checking (TSC) checkers for a class of Borden codes is given and their applicability is discussed. The TSC checkers designed in this paper are impressively more efficient, with respect to implementation cost and speed, than the corresponding checkers hitherto proposed in the literature View full abstract»

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  • Construction of systematic codes for unidirectional error control

    Publication Year: 1995, Page(s):1331 - 1334
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (328 KB)

    Construction methods for systematic t-UEC d-UED codes are proposed. These are codes that are able to simultaneously correct up to t unidirectional errors and detect from t+1 up to d unidirectional errors. Both encoding and decoding procedures are provided. The efficiency of the codes is discussed and compared to the efficiencies of known corresponding codes with slightly stronger or weaker error c... View full abstract»

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  • An algorithm for exact bounds on the time separation of events in concurrent systems

    Publication Year: 1995, Page(s):1306 - 1317
    Cited by:  Papers (59)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1068 KB)

    Determining the time separation of events is a fundamental problem in the analysis, synthesis, and optimization of concurrent systems. Applications range from logic optimization of asynchronous digital circuits to evaluation of execution times of programs for real-time systems. We present an efficient algorithm to find exact (tight) bounds on the separation time of events in an arbitrary process g... View full abstract»

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  • On the maximum value of aliasing probabilities for single input signature registers

    Publication Year: 1995, Page(s):1265 - 1274
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (748 KB)

    The aliasing error performance of a signature register is measured by the maximum values of the aliasing error probabilities for certain ranges of the bit-error rate (and those of the test length). Based on these measures, we evaluate the performances of all the single input signature registers whose feedback polynomials are primitive polynomials of degree 16 and generator polynomials of the doubl... View full abstract»

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  • On routability for FPGAs under faulty conditions

    Publication Year: 1995, Page(s):1296 - 1305
    Cited by:  Papers (23)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (880 KB)

    The field programmable gate array (FPGA) routing resources are fixed and their usage is constrained by the location of programmable interconnects (PIs) such as antifuses. The routing or the interconnect delays are determined by the length of segments assigned to the nets of various lengths and the number of PIs programmed for routing of each net. Due to the use of PIs certain unconventional faults... View full abstract»

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  • Implementing multiplication with split read-only memory

    Publication Year: 1995, Page(s):1352 - 1356
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (404 KB)

    In look-up table-based multiplication schemes, techniques based on tables of squares require less memory than techniques based on direct implementations. In this paper, we present a method to realize an n-bit multiplier using a table of squares for n-bit integers. A new technique to store tables of squares is also presented. The new scheme is shown to compare favorably, in terms of storage require... View full abstract»

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  • Division using a logarithmic-exponential transform to form a short reciprocal

    Publication Year: 1995, Page(s):1326 - 1330
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (448 KB)

    Two trees are used sequentially to calculate an approximation to 1/A, where 1⩽A<2. These trees calculate the logarithm and exponential, and the division (reciprocation) process can be described by 1/A=e-lnA/. For bit skip accuracy of six to 10, this logarithmic-exponential method uses significantly less hardware with respect to the scheme in Mandelbaum (1993), and the delays may ... View full abstract»

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  • Zero-aliasing for modeled faults

    Publication Year: 1995, Page(s):1283 - 1295
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1144 KB)

    When using built-in self-test (BIST) for testing VLSI circuits the circuit response to an input test sequence, which may consist of thousands to millions of bits, is compacted into a signature which consists of only tens of bits. Usually a linear feedback shift register (LFSR) is used for response compaction via polynomial division. The compacting function is a many-to-one function and as a result... View full abstract»

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  • Hypercube multiprocessors with bus connections for improving communication performance

    Publication Year: 1995, Page(s):1338 - 1344
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (576 KB)

    A modified hypercube with multiple buses used as bypass routes is proposed. This is achieved by partitioning all processor elements into subsets using coding theory and by connecting all PEs in each subset to a bus. The basic structure for small systems reduces the diameter to two (one on a bus plus one on a link). In the generalized structure for large systems, it is reduced to less than about on... View full abstract»

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  • A continued-fraction analysis of trigonometric argument reduction

    Publication Year: 1995, Page(s):1348 - 1351
    Cited by:  Papers (13)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (364 KB)

    The calculation of a trigonometric function of a large argument x is effectively carried out by finding the integer N and 0<α<1 such that x=(N+α)π/4. This reduction module π/4 makes it possible to calculate a trigonometric function of a reduced argument, either απ/4 or (1-α)π/4, which lies in the interval (0, π/4). Payne and Hanek (1983) described an ef... View full abstract»

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  • Efficient partitioning of sequences

    Publication Year: 1995, Page(s):1322 - 1326
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (440 KB)

    We consider the problem of partitioning a sequence of n real numbers into p intervals such that the cost of the most expensive interval, measured with a cost function f is minimized. This problem is of importance for the scheduling of jobs both in parallel and pipelined environments. We develop a straightforward and practical dynamic programming algorithm that solves this problem in time O(p(n-p))... View full abstract»

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  • Can nonlinear compactors be better than linear ones?

    Publication Year: 1995, Page(s):1275 - 1282
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (628 KB)

    This paper presents a new analytical method for estimating compaction quality, based on the entropy. Maximization of the entropy of the signature results in an increase of compaction quality. The paper studies the influence of the architecture of a compactor on the entropy growth. This approach is suitable for nonlinear compactors, widely known linear feedback shift registers (LFSRs) and the count... View full abstract»

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  • Fast vectorization for calculating a moving sum

    Publication Year: 1995, Page(s):1335 - 1337
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (232 KB)

    A simple vectorized method for calculating a moving sum is developed. Our proposed method is suitable for register-to-register vector computers and entails much less redundant floating-point operations than the vectorized algorithm of Mossberg (1987). We demonstrate the performance of our vectorized algorithm on the CRAY X-MP EA/116se supercomputer View full abstract»

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  • Error analysis of approximate Chinese-remainder-theorem decoding

    Publication Year: 1995, Page(s):1344 - 1348
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (400 KB)

    Approximate Chinese-remainder-theorem decoding of residue numbers is a useful operation in residue arithmetic. The decoding yields an approximation to (X mod M)M, in the range [0, 1), where X is the input number and M is the product of all moduli. We show the error distribution and worst-case errors for both the truncation and rounding versions of the approximate decoding procedure. We also prove ... View full abstract»

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org