Architecture of a vertically stacked reconfigurable computer
Stevenson, D.S.; Conn, R.O.
Page(s): 1-6
Digital Object Identifier 10.1109/HPRCTA.2008.4745678 Abstract
| Full Text: PDF (1345 KB)
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Scalable FPGA-array for high-performance and power-efficient computation based on difference schemes
Sano, K.; Luzhou Wang; Hatsuda, Y.; Yamamoto, S.
Page(s): 1-9
Digital Object Identifier 10.1109/HPRCTA.2008.4745679 Abstract
| Full Text: PDF (953 KB)
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Evaluating FPGAs for floating-point performance
Strenski, D.; Simkins, J.; Walke, R.; Wittig, R.
Page(s): 1-6
Digital Object Identifier 10.1109/HPRCTA.2008.4745680 Abstract
| Full Text: PDF (183 KB)
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Hardware task scheduling optimizations for reconfigurable computing
Miaoqing Huang; Simmler, H.; Saha, P.; El-Ghazawi, T.
Page(s): 1-10
Digital Object Identifier 10.1109/HPRCTA.2008.4745681 Abstract
| Full Text: PDF (486 KB)
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MPI as an abstraction for software-hardware interaction for HPRCs
Saldana, M.; Patel, A.; Madill, C.; Nunes, D.; Danyao Wang; Styles, H.; Putnam, A.; Wittig, R.; Chow, P.
Page(s): 1-10
Digital Object Identifier 10.1109/HPRCTA.2008.4745682 Abstract
| Full Text: PDF (267 KB)
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Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems
El-Araby, E.; Gonzalez, I.; El-Ghazawi, T.
Page(s): 1-8
Digital Object Identifier 10.1109/HPRCTA.2008.4745683 Abstract
| Full Text: PDF (349 KB)
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Massively parallelized Quasi-Monte Carlo financial simulation on a FPGA supercomputer
Xiang Tian; Benkrid, K.
Page(s): 1-8
Digital Object Identifier 10.1109/HPRCTA.2008.4745684 Abstract
| Full Text: PDF (449 KB)
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Performance potential of molecular dynamics simulations on high performance reconfigurable computing systems
Chin, M.; Herbordt, M.C.; Langhammer, M.
Page(s): 1-10
Digital Object Identifier 10.1109/HPRCTA.2008.4745685 Abstract
| Full Text: PDF (7502 KB)
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Floating point based Cellular Automata simulations using a dual FPGA-enabled system
Murtaza, S.; Hoekstra, A.G.; Sloot, P.M.A.
Page(s): 1-8
Digital Object Identifier 10.1109/HPRCTA.2008.4745686 Abstract
| Full Text: PDF (3314 KB)
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Implementing phase unwrapping using Field Programmable Gate Arrays or Graphics Processing Units: A comparison
Braganza, S.; Leeser, M.
Page(s): 1-10
Digital Object Identifier 10.1109/HPRCTA.2008.4745687 Abstract
| Full Text: PDF (470 KB)
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