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Computer Design, 2000. Proceedings. 2000 International Conference on
  Date: 2000 
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2000 International Conference on Computer Design

Page(s): iii-xi
Abstract  | Full Text: PDF (340 KB)
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On the road to a mobile information society

Friebel, D.
Page(s): 3-3
Abstract  | Full Text: PDF (28 KB)
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Architectural impact of secure socket layer on Internet servers

Kant, K.; Iyer, R.; Mohapatra, P.
Page(s): 7-14
Digital Object Identifier 10.1109/ICCD.2000.878263
Abstract  | Full Text: PDF (712 KB)
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Fast subword permutation instructions using omega and flip network stages

Yang, X.; Lee, R.B.
Page(s): 15-22
Digital Object Identifier 10.1109/ICCD.2000.878264
Abstract  | Full Text: PDF (640 KB)
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Sleipnir. An instruction-level simulator generator

Jeremiassen, T.E.
Page(s): 23-31
Digital Object Identifier 10.1109/ICCD.2000.878265
Abstract  | Full Text: PDF (756 KB)
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Analog transient concurrent fault simulation with dynamic fault grouping

Hou, J.; Chatterjee, A.
Page(s): 35-41
Digital Object Identifier 10.1109/ICCD.2000.878266
Abstract  | Full Text: PDF (612 KB)
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Pseudoexhaustive TPG with a provably low number of LFSR seeds

Kagaris, D.; Tragoudas, S.
Page(s): 42-47
Digital Object Identifier 10.1109/ICCD.2000.878267
Abstract  | Full Text: PDF (476 KB)
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An application of genetic algorithms and BDDs to functional testing

Ferrandi, F.; Fin, A.; Fummi, F.; Sciuto, D.
Page(s): 48-56
Digital Object Identifier 10.1109/ICCD.2000.878268
Abstract  | Full Text: PDF (596 KB)
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High-performance, low-power skewed static logic in very deep-submicron (VDSM) technology

Chulwoo Kim; Jaesik Lee; Kwang-Hyun Baek; Martina, E.; Sung-Mo Kang
Page(s): 59-64
Digital Object Identifier 10.1109/ICCD.2000.878269
Abstract  | Full Text: PDF (432 KB)
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Estimation of inductive and resistive switching noise on power supply network in deep sub-micron CMOS circuits

Zhao, S.; Roy, K.; Koh, C.-K.
Page(s): 65-72
Digital Object Identifier 10.1109/ICCD.2000.878270
Abstract  | Full Text: PDF (564 KB)
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Self calibrating clocks for globally asynchronous locally synchronous systems

Moore, S.W.; Taylor, G.S.; Cunningham, P.A.; Mullins, R.D.; Robinson, P.
Page(s): 73-78
Digital Object Identifier 10.1109/ICCD.2000.878271
Abstract  | Full Text: PDF (448 KB)
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Hybridizing and coalescing load value predictors

Burtscher, M.; Zorn, B.G.
Page(s): 81-92
Digital Object Identifier 10.1109/ICCD.2000.878272
Abstract  | Full Text: PDF (1116 KB)
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The 2-way thrashing-avoidance cache (TAC): an efficient instruction cache scheme for object-oriented languages

Chu, Y.; Ito, M.R.
Page(s): 93-98
Digital Object Identifier 10.1109/ICCD.2000.878273
Abstract  | Full Text: PDF (456 KB)
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Architectural support for dynamic memory management

Morris Chang, J.; Srisa-an, W.; Lo, C.-T.D.
Page(s): 99-104
Digital Object Identifier 10.1109/ICCD.2000.878274
Abstract  | Full Text: PDF (492 KB)
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SCIMA: Software controlled integrated memory architecture for high performance computing

Kondo, M.; Okawara, H.; Nakamura, H.; Boku, T.
Page(s): 105-111
Digital Object Identifier 10.1109/ICCD.2000.878275
Abstract  | Full Text: PDF (580 KB)
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Worst delay estimation in crosstalk aware static timing analysis

Xiao, T.; Marek-Sadowska, M.
Page(s): 115-120
Digital Object Identifier 10.1109/ICCD.2000.878276
Abstract  | Full Text: PDF (516 KB)
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Analysis and optimization of ground bounce in digital CMOS circuits

Heydari, P.; Pedram, M.
Page(s): 121-126
Digital Object Identifier 10.1109/ICCD.2000.878277
Abstract  | Full Text: PDF (544 KB)
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An efficient and accurate model for RF/microwave spiral inductors using microstrip lines theory

Masoumi, N.; Safavi-Naeini, S.; Elmasry, M.I.
Page(s): 127-132
Digital Object Identifier 10.1109/ICCD.2000.878278
Abstract  | Full Text: PDF (436 KB)
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Comparative study of parallel algorithms for 3-D capacitance extraction on distributed memory multiprocessors

Yuan, Y.; Banerjee, P.
Page(s): 133-138
Digital Object Identifier 10.1109/ICCD.2000.878279
Abstract  | Full Text: PDF (460 KB)
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A novel low-power microprocessor architecture

Hakenes, R.; Manoli, Y.
Page(s): 141-146
Digital Object Identifier 10.1109/ICCD.2000.878280
Abstract  | Full Text: PDF (596 KB)
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A power perspective of value speculation for superscalar microprocessors

Moreno, R.; Pinuel, L.; del Pino, S.; Tirado, F.
Page(s): 147-154
Digital Object Identifier 10.1109/ICCD.2000.878281
Abstract  | Full Text: PDF (616 KB)
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Multilevel reverse-carry adder

Bruguera, J.D.; Lang, T.
Page(s): 155-162
Digital Object Identifier 10.1109/ICCD.2000.878282
Abstract  | Full Text: PDF (516 KB)
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Evaluating signal processing and multimedia applications on SIMD, VLIW and superscalar architectures

Talla, D.; John, L.K.; Lapinskii, V.; Evans, B.L.
Page(s): 163-172
Digital Object Identifier 10.1109/ICCD.2000.878283
Abstract  | Full Text: PDF (1252 KB)
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Unified fine-granularity buffering of index and data: approach and implementation

Cao, Q.; Torrellas, J.; Jagadish, H.V.
Page(s): 175-186
Digital Object Identifier 10.1109/ICCD.2000.878284
Abstract  | Full Text: PDF (952 KB)
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Analysis of shared memory misses and reference patterns

Rothman, J.B.; Smith, A.J.
Page(s): 187-198
Digital Object Identifier 10.1109/ICCD.2000.878285
Abstract  | Full Text: PDF (1016 KB)
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