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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Volume: 17  Issue: 3   Date: March 2009
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Special Section on International Symposium on Networks-on-Chip (NOCS)

Kolodny, A.; Peh, L.-S.
Page(s): 317-318
Digital Object Identifier 10.1109/TVLSI.2009.2012524
Abstract  | Full Text: PDF (444 KB)
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An Energy and Performance Exploration of Network-on-Chip Architectures

Banerjee, A.; Wolkotte, P.T.; Mullins, R.D.; Moore, S.W.; Smit, G.J.M.
Page(s): 319-329
Digital Object Identifier 10.1109/TVLSI.2008.2011232
Abstract  | Full Text: PDF (904 KB)
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Design and Management of Voltage-Frequency Island Partitioned Networks-on-Chip

Ogras, U.Y.; Marculescu, R.; Marculescu, D.; Eun Gu Jung
Page(s): 330-341
Digital Object Identifier 10.1109/TVLSI.2008.2011229
Abstract  | Full Text: PDF (1405 KB)
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Custom Networks-on-Chip Architectures With Multicast Routing

Shan Yan; Lin, B.
Page(s): 342-355
Digital Object Identifier 10.1109/TVLSI.2008.2011240
Abstract  | Full Text: PDF (1244 KB)
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Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs

Mejia, A.; Palesi, M.; Flich, J.; Kumar, S.; Lopez, P.; Holsmark, R.; Duato, J.
Page(s): 356-369
Digital Object Identifier 10.1109/TVLSI.2008.2012010
Abstract  | Full Text: PDF (1979 KB)
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81.6 GOPS Object Recognition Processor Based on a Memory-Centric NoC

Donghyun Kim; Kwanho Kim; Joo-Young Kim; Seungjin Lee; Se-Joong Lee; Hoi-Jun Yoo
Page(s): 370-383
Digital Object Identifier 10.1109/TVLSI.2008.2011226
Abstract  | Full Text: PDF (3447 KB)
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A Case Study for NoC-Based Homogeneous MPSoC Architectures

Tota, S.V.; Casu, M.R.; Roch, M.R.; Macchiarulo, L.; Zamboni, M.
Page(s): 384-388
Digital Object Identifier 10.1109/TVLSI.2008.2011239
Abstract  | Full Text: PDF (1192 KB)
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Design Optimization of Time- and Cost-Constrained Fault-Tolerant Embedded Systems With Checkpointing and Replication

Pop, P.; Izosimov, V.; Eles, P.; Zebo Peng
Page(s): 389-402
Digital Object Identifier 10.1109/TVLSI.2008.2003166
Abstract  | Full Text: PDF (1338 KB)
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Optimal Periodic Memory Allocation for Image Processing With Multiple Windows

Kobayashi, Y.; Hariyama, M.; Kameyama, M.
Page(s): 403-416
Digital Object Identifier 10.1109/TVLSI.2008.2004547
Abstract  | Full Text: PDF (1396 KB)
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Variable-Bin-Rate CABAC Engine for H.264/AVC High Definition Real-Time Decoding

Peng Zhang; Don Xie; Wen Gao
Page(s): 417-426
Digital Object Identifier 10.1109/TVLSI.2008.2005286
Abstract  | Full Text: PDF (477 KB)
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Power Management of Voltage/Frequency Island-Based Systems Using Hardware-Based Methods

Choudhary, P.; Marculescu, D.
Page(s): 427-438
Digital Object Identifier 10.1109/TVLSI.2008.2005309
Abstract  | Full Text: PDF (1176 KB)
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Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations

Yang Liu; Tong Zhang; Jiang Hu
Page(s): 439-443
Digital Object Identifier 10.1109/TVLSI.2008.2004545
Abstract  | Full Text: PDF (759 KB)
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Fast Scaling in the Residue Number System

Yinan Kong; Phillips, B.
Page(s): 443-447
Digital Object Identifier 10.1109/TVLSI.2008.2004550
Abstract  | Full Text: PDF (200 KB)
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Fully Monolithic Cellular Buck Converter Design for 3-D Power Delivery

Jian Sun; Giuliano, D.; Devarajan, S.; Jian-Qiang Lu; Chow, T.P.; Gutmann, R.J.
Page(s): 447-451
Digital Object Identifier 10.1109/TVLSI.2008.2005312
Abstract  | Full Text: PDF (1044 KB)
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems society information

Page(s): C3-C3
Digital Object Identifier 10.1109/TVLSI.2009.2015389
Abstract  | Full Text: PDF (27 KB)
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems information for authors

Page(s): C4-C4
Digital Object Identifier 10.1109/TVLSI.2009.2015391
Abstract  | Full Text: PDF (28 KB)
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