Programming a hyper-programmable architecture for networked systems
Keller, E.; Brebner, G.
Page(s): 1- 8
Digital Object Identifier 10.1109/FPT.2004.1393244 Abstract
| Full Text: PDF (845 KB)
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Self-recovery experiments in extreme environments using a field programmable transistor array
Stoica, A.; Keymeulen, D.; Arslan, T.; Vu Duong; Zebulum, R.; Ferguson, I.; Xin Guo
Page(s): 9- 15
Digital Object Identifier 10.1109/FPT.2004.1393245 Abstract
| Full Text: PDF (798 KB)
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Field programmable gate array implementation of a generalized decoder for structured low-density parity check codes
Lingyan Sun; Vijaya Kumar, B.V.K.
Page(s): 17- 24
Digital Object Identifier 10.1109/FPT.2004.1393246 Abstract
| Full Text: PDF (813 KB)
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Partial character decoding for improved regular expression matching in FPGAs
Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays
Wilton, S.J.E.; Kafafi, N.; Bingfeng Mei; Vernalde, S.
Page(s): 33- 40
Digital Object Identifier 10.1109/FPT.2004.1393248 Abstract
| Full Text: PDF (806 KB)
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Directional and single-driver wires in FPGA interconnect
Lemieux, G.; Lee, E.; Tom, M.; Yu, A.
Page(s): 41- 48
Digital Object Identifier 10.1109/FPT.2004.1393249 Abstract
| Full Text: PDF (838 KB)
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A greedy algorithm for tolerating defective crosspoints in nanoPLA design
Naeimi, H.; DeHon, A.
Page(s): 49- 56
Digital Object Identifier 10.1109/FPT.2004.1393250 Abstract
| Full Text: PDF (842 KB)
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SHAPER: synthesis for hybrid FPGAs containing PLAs using reconvergence analysis
Manimegalai, R.; Jayaram, B.; Manojkumar, A.; Kamakoti, V.
Page(s): 57- 64
Digital Object Identifier 10.1109/FPT.2004.1393251 Abstract
| Full Text: PDF (793 KB)
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Placement and routing for non-rectangular embedded programmable logic cores in SoC design
Wong, T.; Wilton, S.J.E.
Page(s): 65- 72
Digital Object Identifier 10.1109/FPT.2004.1393252 Abstract
| Full Text: PDF (857 KB)
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QuickRoute: a fast routing algorithm for pipelined architectures
Song Li; Ebeling, C.
Page(s): 73- 80
Digital Object Identifier 10.1109/FPT.2004.1393253 Abstract
| Full Text: PDF (919 KB)
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An FPGA-based Othello endgame solver
Wong, C.K.; Lo, K.K.; Leong, P.H.W.
Page(s): 81- 88
Digital Object Identifier 10.1109/FPT.2004.1393254 Abstract
| Full Text: PDF (733 KB)
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Real-time detection of line segments using the line Hough transform
Nagata, N.; Maruyama, T.
Page(s): 89- 96
Digital Object Identifier 10.1109/FPT.2004.1393255 Abstract
| Full Text: PDF (738 KB)
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gNBX - reconfigurable hardware acceleration of self-organizing maps
Pohl, C.; Franzmeier, M.; Porrmann, M.; Ruckert, U.
Page(s): 97- 104
Digital Object Identifier 10.1109/FPT.2004.1393256 Abstract
| Full Text: PDF (820 KB)
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