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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Volume: 12  Issue: 9   Date: Sept. 2004
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Critical evaluation of SOI design guidelines

Kanj, R.; Rosenbaum, E.
Page(s):  885- 894
Digital Object Identifier 10.1109/TVLSI.2004.833665
Abstract  | Full Text: PDF (568 KB)
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A 13-bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula

Chua-Chin Wang; Yih-Long Tseng; Hsien-Chih She; Chih-Chen Li; Hu, R.
Page(s):  895- 900
Digital Object Identifier 10.1109/TVLSI.2004.833664
Abstract  | Full Text: PDF (776 KB)
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A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches

Chua-Chin Wang; Yih-Long Tseng; Hon-Yuan Leo; Hu, R.
Page(s):  901- 909
Digital Object Identifier 10.1109/TVLSI.2004.833669
Abstract  | Full Text: PDF (1128 KB)
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On circuit techniques to improve noise immunity of CMOS dynamic logic

Li Ding; Mazumder, P.
Page(s):  910- 925
Digital Object Identifier 10.1109/TVLSI.2004.833668
Abstract  | Full Text: PDF (728 KB)
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High performance level conversion for dual VDD design

Kulkarni, S.H.; Sylvester, D.
Page(s):  926- 936
Digital Object Identifier 10.1109/TVLSI.2004.833667
Abstract  | Full Text: PDF (1264 KB)
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Distributed sleep transistor network for power reduction

Changbo Long; Lei He
Page(s):  937- 946
Digital Object Identifier 10.1109/TVLSI.2004.832939
Abstract  | Full Text: PDF (416 KB)
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Reverse-body bias and supply collapse for low effective standby power

Clark, L.T.; Morrow, M.; Brown, W.
Page(s):  947- 956
Digital Object Identifier 10.1109/TVLSI.2004.832930
Abstract  | Full Text: PDF (464 KB)
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High-speed VLSI architectures for the AES algorithm

Xinmiao Zhang; Parhi, K.K.
Page(s):  957- 967
Digital Object Identifier 10.1109/TVLSI.2004.832943
Abstract  | Full Text: PDF (576 KB)
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Design and implementation of low-energy turbo decoders

Kaza, J.; Chakrabarti, C.
Page(s):  968- 977
Digital Object Identifier 10.1109/TVLSI.2004.832942
Abstract  | Full Text: PDF (456 KB)
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A behavioral synthesis system for asynchronous circuits

Sacker, M.; Brown, A.D.; Rushton, A.J.; Wilson, P.R.
Page(s):  978- 994
Digital Object Identifier 10.1109/TVLSI.2004.832944
Abstract  | Full Text: PDF (872 KB)
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Variable precision arithmetic circuits for FPGA-based multimedia processors

Perri, S.; Corsonello, P.; Iachino, M.A.; Lanuzza, M.; Cocorullo, G.
Page(s):  995- 999
Digital Object Identifier 10.1109/TVLSI.2004.833400
Abstract  | Full Text: PDF (216 KB)
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2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005)

Page(s):  1000- 1000
Digital Object Identifier 10.1109/TVLSI.2004.835940
Abstract  | Full Text: PDF (536 KB)
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems information for authors

Page(s):  c4- c4
Digital Object Identifier 10.1109/TVLSI.2004.835939
Abstract  | Full Text: PDF (30 KB)
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