Low-power fully integrated 10-Gb/s SONET/SDH transceiver in 0.13-μm CMOS
Henrickson, L.; Shen, D.; Nellore, U.; Ellis, A.; Joong Oh; Hui Wang; Capriglione, G.; Atesoglu, A.; Yang, A.; Wu, P.; Quadri, S.; Crosbie, D.
Page(s): 1595- 1601
Digital Object Identifier 10.1109/JSSC.2003.817586 Abstract
| Full Text: PDF (479 KB)
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A low-power CMOS Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator
Sangjin Byun; Chan-Hong Park; Yongchul Song; Sungho Wang; Conroy, C.S.G.; Beomsup Kim
Page(s): 1609- 1618
Digital Object Identifier 10.1109/JSSC.2003.817265 Abstract
| Full Text: PDF (902 KB)
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A four-input beam-forming downconverter for adaptive antennas
Yamaji, T.; Kurose, D.; Watanabe, O.; Obayashi, S.; Itakura, T.
Page(s): 1619- 1625
Digital Object Identifier 10.1109/JSSC.2003.817262 Abstract
| Full Text: PDF (479 KB)
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Fully integrated passive UHF RFID transponder IC with 16.7-μW minimum RF input power
Karthaus, U.; Fischer, M.
Page(s): 1602- 1608
Digital Object Identifier 10.1109/JSSC.2003.817249 Abstract
| Full Text: PDF (503 KB)
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A 10-GHz CMOS quadrature LC-VCO for multirate optical applications
Shenggao Li; Kipnis, I.; Ismail, M.
Page(s): 1626- 1634
Digital Object Identifier 10.1109/JSSC.2003.817258 Abstract
| Full Text: PDF (669 KB)
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A digital quadrature modulator with on-chip D/A converter
Vankka, J.; Sommarek, J.; Ketola, J.; Teikari, I.; Halonen, K.A.I.
Page(s): 1635- 1642
Digital Object Identifier 10.1109/JSSC.2003.817252 Abstract
| Full Text: PDF (617 KB)
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A 1-V 2.5-mW 5.2-GHz frequency divider in a 0.35-μm CMOS process
Wong, J.M.C.; Cheung, V.S.L.; Luong, H.C.
Page(s): 1643- 1648
Digital Object Identifier 10.1109/JSSC.2003.817261 Abstract
| Full Text: PDF (480 KB)
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Low-jitter digital timing recovery techniques for CAP-based VDSL applications
Yongchul Song; Beomsup Kim
Page(s): 1649- 1656
Digital Object Identifier 10.1109/JSSC.2003.817250 Abstract
| Full Text: PDF (910 KB)
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A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function
Rombouts, P.; De Maeyer, J.; Weyten, L.
Page(s): 1657- 1662
Digital Object Identifier 10.1109/JSSC.2003.817600 Abstract
| Full Text: PDF (406 KB)
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A highly linear 125-MHz CMOS switched-resistor programmable-gain amplifier
Cheng-Chung Hsu; Jieh-Tsorng Wu
Page(s): 1663- 1670
Digital Object Identifier 10.1109/JSSC.2003.817665 Abstract
| Full Text: PDF (505 KB)
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A low-power high-PSRR current-mode microphone preamplifier
Baker, M.W.; Sarpeshkar, R.
Page(s): 1671- 1678
Digital Object Identifier 10.1109/JSSC.2003.817255 Abstract
| Full Text: PDF (568 KB)
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An arbitrary waveform stimulus circuit for visual prostheses using a low-area multibias DAC
DeMarco, S.C.; Wentai Liu; Singh, P.R.; Lazzi, G.; Humayun, M.S.; Weiland, J.D.
Page(s): 1679- 1690
Digital Object Identifier 10.1109/JSSC.2003.817264 Abstract
| Full Text: PDF (1101 KB)
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A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation
Ka Nang Leung; Mok, P.K.T.
Page(s): 1691- 1702
Digital Object Identifier 10.1109/JSSC.2003.817256 Abstract
| Full Text: PDF (897 KB)
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A single-chip programmable platform based on a multithreaded processor and configurable logic clusters
Young-Don Bae; Seong-Il Park; In-Cheol Park
Page(s): 1703- 1711
Digital Object Identifier 10.1109/JSSC.2003.817259 Abstract
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An SRAM design using dual threshold voltage transistors and low-power quenchers
Chua-Chin Wang; Po-Ming Lee; Kuo-Long Chen
Page(s): 1712- 1720
Digital Object Identifier 10.1109/JSSC.2003.817254 Abstract
| Full Text: PDF (830 KB)
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Area-efficient CMOS charge pumps for LCD drivers
TianRui Ying; Wing-Hung Ki; Mansun Chan
Page(s): 1721- 1725
Digital Object Identifier 10.1109/JSSC.2003.817596 Abstract
| Full Text: PDF (663 KB)
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Two-phase boosted voltage generator for low-voltage DRAMs
Seong-Ik Cho; Jung-Hwan Lee; Hong-June Park; Gyu-Ho Lim; Young-Hee Kim
Page(s): 1726- 1729
Digital Object Identifier 10.1109/JSSC.2003.817592 Abstract
| Full Text: PDF (425 KB)
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A 200-V high-voltage amplifier using a parasitic field-oxide transistor for voltage feedback
Lemkin, M.
Page(s): 1730- 1734
Digital Object Identifier 10.1109/JSSC.2003.817594 Abstract
| Full Text: PDF (446 KB)
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Reversed nested Miller compensation with voltage buffer and ing resistor
Kin-Pui Ho; Cheong-Fat Chan; Chiu-Sing Choy; Kong-Pang Pun
Page(s): 1735- 1738
Digital Object Identifier 10.1109/JSSC.2003.817598 Abstract
| Full Text: PDF (386 KB)
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A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation
Hoi Lee; Ka Nang Leung; Mok, P.K.T.
Page(s): 1739- 1744
Digital Object Identifier 10.1109/JSSC.2003.817597 Abstract
| Full Text: PDF (424 KB)
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A 2-Vpp 80-200-MHz fourth-order continuous-time linear phase filter with automatic frequency tuning
Mingdeng Chen; Silva-Martinez, J.; Rokhsaz, S.; Robinson, M.
Page(s): 1745- 1749
Digital Object Identifier 10.1109/JSSC.2003.817595 Abstract
| Full Text: PDF (463 KB)
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A low-power wide dynamic range envelope detector
Zhak, S.M.; Baker, M.W.; Sarpeshkar, R.
Page(s): 1750- 1753
Digital Object Identifier 10.1109/JSSC.2003.817599 Abstract
| Full Text: PDF (405 KB)
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Pipelined delay-sum architecture based on bucket-brigade devices for on-chip ultrasound beamforming
Yaowu Mo; Tanaka, T.; Arita, S.; Tsuchitani, A.; Inoue, K.; Suzuki, Y.
Page(s): 1754- 1757
Digital Object Identifier 10.1109/JSSC.2003.817603 Abstract
| Full Text: PDF (239 KB)
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An 8-bit 100-MHz CMOS linear interpolation DAC
Yijun Zhou; Jiren Yuan
Page(s): 1758- 1761
Digital Object Identifier 10.1109/JSSC.2003.817593 Abstract
| Full Text: PDF (305 KB)
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Even harmonic double-balanced active mixer for use in direct conversion receivers
Goldfarb, M.; Balboni, E.; Cavey, J.
Page(s): 1762- 1766
Digital Object Identifier 10.1109/JSSC.2003.817602 Abstract
| Full Text: PDF (382 KB)
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