Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2005. MEMOCODE '05.

11-14 July 2005

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  • Proceedings. Third ACM & IEEE International Conference on Formal Methods and Models for Co-Design (IEEE Cat. No. 05EX1093)

    Publication Year: 2005
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  • [Breaker page]

    Publication Year: 2005, Page(s):1 - 2
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  • A synchronous language at work: the story of Lustre

    Publication Year: 2005, Page(s):3 - 11
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (195 KB) | HTML iconHTML

    We recall the story of the development of the synchronous data-flow language Lustre and of its industrial transfer inside the toolset SCADE. We try to analyse the reasons of its success, and to report the main lessons we got from the transfer of an academic concept into real industrial world. View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):13 - 14
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  • Synthesis of synchronous assertions with guarded atomic actions

    Publication Year: 2005, Page(s):15 - 24
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (558 KB) | HTML iconHTML

    The SystemVerilog standard introduces SystemVerilog Assertions (SVA), a synchronous assertion package based on the temporal-logic semantics of PSL. Traditionally assertions are checked in software simulation. We introduce a method for synthesizing SVA directly into hardware modules in Bluespec SystemVerilog. This opens up new possibilities for FPGA-accelerated testbenches, hardware/software co-emu... View full abstract»

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  • Automatic synthesis of cache-coherence protocol processors using Bluespec

    Publication Year: 2005, Page(s):25 - 34
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (313 KB) | HTML iconHTML

    There are few published examples of the proof of correctness of a cache-coherence protocol expressed in an HDL. A designer generally shows the correctness of a protocol where many implementation details have been abstracted away. Abstract protocols are often expressed as a table of rules or state transition diagrams with an (implicit) model of atomic actions. There is enough of a semantic gap betw... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):35 - 36
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  • Deterministic receptive processes are Kahn processes

    Publication Year: 2005, Page(s):37 - 44
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (221 KB) | HTML iconHTML

    Deterministic asynchronous concurrent formalisms are valuable because determinism greatly simplifies the design and validation of such systems and most concurrent formalisms are nondeterministic. This paper connects two of the more successful deterministic asynchronous formalisms: Kahn's dataflow networks and Josephs's deterministic receptive processes. The main result: a divergence-free determini... View full abstract»

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  • Structural operational semantics for supporting multi-cycle operations in RTL HDLs

    Publication Year: 2005, Page(s):45 - 53
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (298 KB) | HTML iconHTML

    In this paper we formally define an operational semantics framework RTL++ for modeling behavioral RTL hardware IP. The semantics we define is neutral to existing HDLs and extends traditional sense RTL by natively supporting pipelined and multi-cycled operations with a unified register variable type. We believe this formalization help to guide the design of new HDLs or extensions of existing ... View full abstract»

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  • PyPBS design and methodologies

    Publication Year: 2005, Page(s):55 - 64
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (550 KB) | HTML iconHTML

    This paper presents results on processor specification from a specialized high-level finite state machine (FSM) language. The language is an extension and enhancement of earlier production based specification (regular automata) work using modern software techniques of modularization, abstraction, and object orientation. A brief overview of the language, its synthesis technique, description methods... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):65 - 66
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  • Making PVS do what you want

    Publication Year: 2005
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (112 KB) | HTML iconHTML

    We focus on how to capture common specification and proof patterns in PVS in order to tailor PVS for the verification of a particular class of systems. The use of specification templates can simplify the development of PVS strategies that correspond to proof steps that recur in proofs of specific classes of system properties. View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):69 - 70
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  • System design extreme makeover

    Publication Year: 2005, Page(s):71 - 75
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (269 KB) | HTML iconHTML

    With complexities of systems-on-chip (SOCs) rising almost daily, the design community has been searching for a new methodology that can handle given complexities with increased productivity and decreased time-to-market. In order to find a solution for the system-level design flow, we must look at the system gap between SW and HW designs and then try to bridge this gap by developing a design flow t... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):77 - 78
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  • Verification of parameterized hierarchical state machines using action language verifier

    Publication Year: 2005, Page(s):79 - 88
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (304 KB) | HTML iconHTML

    Action language verifier (ALV) is an infinite-state symbolic model checker. ALV can verify (or falsify, by generating counter-examples) temporal logic properties of systems that can be modeled using a combination of Boolean logic and linear arithmetic expressions on Boolean, enumerated and (possibly unbounded) integer variables and parameterized integer constants. In this paper, we apply ALV to th... View full abstract»

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  • Verification of low-level crypto-protocol implementations using automated theorem proving

    Publication Year: 2005, Page(s):89 - 98
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (365 KB) | HTML iconHTML

    Designing and implementing cryptographic protocols is known to be difficult. A lot of research has been devoted to developing formal techniques to analyze abstract designs of cryptographic protocols. Less attention has been paid to the verification of implementation-relevant aspects of cryptographic protocols. This is an important challenge since it is non-trivial to securely implement secure desi... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):99 - 100
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  • Formal verification of SystemC by automatic hardware/software partitioning

    Publication Year: 2005, Page(s):101 - 110
    Cited by:  Papers (33)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (354 KB) | HTML iconHTML

    Variants of general-purpose programming languages, like SystemC, are increasingly used to specify system designs that have both hardware and software parts. The system-level languages allow a flexible partitioning in the design of the hardware and software. Moreover, many properties depend on the combination of hardware and software and cannot be verified on either part alone. Existing tools eithe... View full abstract»

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  • Translation-based co-verification

    Publication Year: 2005, Page(s):111 - 120
    Cited by:  Papers (2)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (284 KB) | HTML iconHTML

    We propose a translation-based approach to hardware and software co-verification of embedded systems using model checking. Software and hardware designs of an embedded system are translated into the input formal language of a state-of-the-art model checker to enable co-verification. The formal model of the whole system is constructed through integrating the translations of hardware and software de... View full abstract»

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  • Synchronization verification in system-level design with ILP solvers

    Publication Year: 2005, Page(s):121 - 130
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (442 KB) | HTML iconHTML

    Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making design and verification difficult tasks. In this work, we propose a synchronization verification method for system-level designs described in the SpecC language. Instead of modeling the design with timed FSMs and using a mo... View full abstract»

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  • Improving SystemC simulation through Petri net reductions

    Publication Year: 2005, Page(s):131 - 140
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (406 KB) | HTML iconHTML

    With the growing acceptance of SystemC in co-design environments there is a need to further improve the simulation performance of complex designs. Our previous work has shown that simulation performance can be improved by carefully restructuring such designs. As a well known formal model for concurrent systems with a good balance between their expressive power and the theoretical results available... View full abstract»

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  • [Breaker page]

    Publication Year: 2005, Page(s):141 - 142
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  • Automotive software and systems engineering

    Publication Year: 2005, Page(s):143 - 149
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (255 KB) | HTML iconHTML

    Information technology has become the driving force of innovation in many areas of technology and, in particular, in the form of embedded systems in vehicles. Embedded hardware/software systems control innovative functions in cars, support and assist the driver and realize new features for information and entertainment. A rapid development brought more and more digital hardware and software into a... View full abstract»

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  • Service-oriented software and systems engineering - a vision for the automotive domain

    Publication Year: 2005
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (171 KB) | HTML iconHTML

    Increasing interactions among automotive software functions and the ensuing complexity demand new ways of developing automotive systems. Many functions deployed in the vehicle cut across physical and logical boundaries. Capturing the core interactions underlying system functions, creating logical service architectures and mapping them to varying deployment architectures and product lines are centr... View full abstract»

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