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Advanced Packaging Materials: Processes, Properties and Interfaces, 2005. Proceedings. International Symposium on

Date 16-18 March 2005

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Displaying Results 1 - 25 of 60
  • Embedding active components inside printed circuit board (PCB) - a solution for miniaturization of electronics

    Page(s): 1 - 4
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    The continuous miniaturization of the electronics sets new requirements for the substrates, component packages and assembly technologies. Traditionally, the passive and active components are mounted on the surface of the PCB using SMA technology. The component size, I/O pitch and line width of the PCB's has been deceasing rapidly during past years. With traditional technologies, it is more difficult to increase the packaging density any more. This has increased interest toward embedding passive and active components inside the substrate. In this paper, the third generation manufacturing process to embed active components inside organic substrate is presented. In the integrated module board (IMB-R) technology, active components are integrated inside an organic substrate, e.g. the printed circuit board (PCB) structure. The manufacturing process allows for an entire product or some of its functional parts to be embedded inside the substrate. The process combines high-density PWB manufacturing, component packaging/assembly and the fabrication of the interconnection into one single manufacturing process flow. The interconnections of the IC's are done simultaneously using electroplating process. The technology enables high interconnection density with good reliability. Also, the IMB technology enables so-called "all-layer-assembly" where the whole three dimensional volume of the module (not only the surfaces) is used for component assembly. View full abstract»

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  • 3D integration of electronics and mechanics

    Page(s): 5 - 8
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    Nowadays, the design is one of the key features for all consumer products. All the novel functions must be available inside fashionable covers. However, the most interesting product shapes are not always possible due the restriction of the traditional rigid printed wiring board (PWB). To achieve a real design freedom, a formable multilayer PWB structure is needed. This paper introduces the three-dimensional printed wiring board and the 3D integration of electronics and mechanics. The 3D integration of electronics and mechanics increases design freedom and space utilization efficiency e.g. in portable devices. The 3D integration technology is enabled by thermoplastic PWB material innovations and a new kind of system integration process. Thermoplastics are formable and they are widely used in many fields, but as a substrate for a multilayer PWB, they are rather new. Furthermore, this paper discusses the benefits and challenges of the 3D integration of electronics and mechanics and the special characteristics of its system design process. Integration of electronics and mechanics has an effect on the design process management. Design phases must be coherent and teamwork needs to be well organized. In addition, special requirements for testing are presented. View full abstract»

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  • Weld clip design for minimization of welding-induced-alignment-distortion in butterfly laser module packages

    Page(s): 9 - 12
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1918 KB) |  | HTML iconHTML  

    The welding-induced-alignment-distortion (WIAD) or post-weld-shift (PWS) is a serious issue in assembling of fiberoptic components using laser welding, which may significantly affect the packaging yield. Our previous investigations have revealed that an elimination or minimization of the WIAD in butterfly laser module packaging is possible if laser welding sequence and pulse shape of the welding lasers can be optimized. This work represents our further attempt in minimizing the WIAD by design of welding tools: the weld clip. By means of numerical simulations, the influence of seven different types of weld clip on the WIAD in the assembly of the butterfly laser module packages has been investigated. A realistic physics based laser-materials interaction model is employed and the model combines the spatal and temporal characteristics of the laser beam and the thermophysical properties of the material. The results show that the design of weld clip is important in packaging of the butterfly modules and the alignment distortion induced during the laser welding process can be controlled within the minimal range by proper design of weld clip and selection of process parameters such as the welding sequence. View full abstract»

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  • Characterizing optically packaged MEMS & MOEMS devices using optical profiling techniques

    Page(s): 13 - 16
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    Optical profiling (white light interferometry) has proven successful for measuring surface features of unpackaged MEMS devices. Most devices, however, perform differently once encased in their final packaging, which may include vacuum, elevated temperature or other special environments. This paper describes a novel interferometric surface profiling technique for high magnification measurement of devices through transparent packaging or environmental chambers. Three techniques are introduced into a long working distance interferometric objective: aberration correction, shaped illumination, and dispersive compensation. Data demonstrates that measurement results through the protective media are comparable to those of a standard objective measuring an unpackaged device. View full abstract»

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  • Substrate effects on the creep properties of pure Sn solder joints

    Page(s): 17 - 20
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    This study investigated the influence of substrate metallization on the microstructure and creep behavior of the pure tin solder joints. Both symmetric (Cu:Cu) and the asymmetric (Cu:Au/Ni) metallizations were tested. The solder joints with asymmetric substrates had lower creep rates than those with symmetric (Cu:Cu) substrates. (Cu-Ni)6Sn5 intermetallics formed on all substrates. However, a dramatic and anomalous intermetallic growth was observed on the Ni-side of the asymmetric joints; after typical reflow the intermetallic reached almost one third of the solder joint thickness. It appears that the abnormally thick intermetallic inhibits creep in the asymmetric joint and is the primary cause of the lower creep rates. View full abstract»

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  • Deformation behavior of solder alloys under variable strain rate shearing & creep conditions

    Page(s): 21 - 26
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    The rate-dependent deformation behavior of Sn3.8AgO.7Cu Pb-free alloy and Sn-Pb eutectic alloy under constant and variable shearing strain rates and creep conditions was studied systematically with thin-walled specimens using a biaxial servo-controlled tension-torsion material testing system. The shearing tests were conducted at strain rates between 10-6/sec to 10-1/sec. Variable strain rate tests were also conducted for sudden strain rates change and stress relaxation to study the post-yielding flow stress dependency on stress. Shearing creep tests were carried at room temperatures under a variety of stress level. It is believed that such a fundamental study of deformation behavior of solder alloys under complex stress conditions is important to understand effects of soldering processes and microstructures on solder interconnect reliability, and also to implement sophisticated 3D time-dependent nonlinear FEM analyses on electronic packages and assemblies. View full abstract»

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  • Morphology, growth and size distribution of Cu6Sn5 intermetallic compound by flux-driven ripening at SnPb solder and Cu interface

    Page(s): 27 - 32
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    The size distribution and growth of scallop-type Cu6Sn5 intermetallic compound at the interface between molten SnPb solder and Cu was investigated, along with morphological change of Cu6Sn5 according to SnPb solder composition. Cu6Sn5 showed round scallop-type morphology when SnPb solder composition was from eutectic (63Sn37Pb) to about 40Sn60Pb. In other compositions, the intermetallic compounds showed faceted morphology. This change of morphology is due to variation of interfacial energy with solder composition. The scallop growth rate is proportional to cube root of time, and size distribution is in good agreement with the flux-driven-ripening (FDR) theory. Comparison with other works showed that intermetallic compound scallops with shape close to hemisphere give better agreement with the FDR theory. View full abstract»

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  • Fundamentals of fluxless soldering technology

    Page(s): 33 - 38
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2016 KB) |  | HTML iconHTML  

    Fluxless (flux-free) soldering technology deals with investigating and developing techniques and methods that can eliminate the use of fluxes in the soldering process. The fluxless feature in soldering processes has become increasing more important and received more attention from industries because there are more and more devices and products that cannot take fluxes in the soldering process. Examples are MEMS devices, sensor devices, biomedical devices, and photonic devices. In addition, in flip-chip soldering processes with very small gap between chips and substrates, flux residues are hard to clean out or are embedded in the underfills. The residues may reduce the reliability of the resulting flip-chip devices. There are two basic fluxless approaches that have been reported. The first is to use chemicals or RF plasma to convert or to remove the oxide layer that already exists. The existence of oxide layer is the reason why the flux is needed in nearly all soldering operations. The second approach is to remove the root cause, which is solder oxidation. This is accomplished by producing the solder materials in a non-oxidizing environment, followed immediately by capping the solder with a barrier layer that would prevent oxygen from penetrating into the solder layer. In this paper, we first present the root cause of needing fluxes in the soldering process. The fluxless processes dealing with oxides are summarized. The four fundamental steps of the oxidation prevention approach are reported. A fluxless process based on Sn-rich Sn-Au alloys is described as an example to illustrate the fluxless fundamentals. Results show that strong and nearly void-free joints can indeed be produced using this new technology. View full abstract»

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  • Volume effect on the soldering reaction between SnAgCu solders and Ni

    Page(s): 39 - 44
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    The diameters of the solder joints in the array-array packages can range from 760 μm (BGA joints) to 75 μam (flip-chip joints). This variation in diameter in fact translates into a 1,000 times difference in volume. Such a large difference in volume produces a pronounced solder volume effect. In this study, the volume effect on the liquid-solid reactions between the Sn3AgxCu (x = 0.4, 0.5, or 0.6 wt.%) solders and Ni was investigated. Three different sizes of solder spheres (760 μm, 500 μm, and 300 μm) were soldered on 400 μm diameter electrolytic Ni soldering pads for 90 sec-20 min at a peak reflow temperature of 235°C. Two reaction products (Cu,Ni)6Sn5 and (Ni,Cu)3Sn4 were present at the interface in all the samples. Interestingly, a massive spalling of (Cu,Ni)6Sn5 from the interface occurred, especially in samples with smaller solder balls and lower Cu concentration. We attributed the massive spalling of (Cu,Ni)6Sn5 to the decrease in the amount of available Cu in the solders as the amount of solder as well as the Cu concentration decreased. The results of this study suggested that a high Cu-content SnAgCu solder should be used to prevent this massive spalling. View full abstract»

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  • Constitutive modeling of lead-free solders

    Page(s): 45 - 49
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    Solders are used extensively as electrical interconnects in microelectronics packaging. Because of environmental concerns, lead-based solders are being replaced by Sn/Ag and Sn/Ag/Cu based solder materials. Since the thermomechanical reliability of modern electronic devices depends on, to a large extent, the fatigue and creep behavior of the solder joints, it is imperative to understand the deformation behavior of these new lead-free solders. This study conducted extensive thermomechanical testing on several commercial lead-free solder alloys. Anand viscoplastic model was used to describe the behavior of these materials with new curve fitting techniques. A modified Anand models was proposed that can yield a more accurate description of lead-free solders. View full abstract»

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  • Effects of current density on electromigration-induced failure in flip chip composite solder joints at room temperature

    Page(s): 50 - 53
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    The electromigration of flip chip solder joints consisting of 97Pb-3Sn and 37Pb-63Sn composite solders was studied under high current densities at room temperature. The MTTF (mean time to failure) and failure modes were found to be strongly dependant on the change of current density. The composite solder joints did not failed after one month stressed at 4.07 × 104A/cm2, but they failed after 10 hours of current stressing at 4.58 × 104 A/cm2. At a slightly higher current stressing of 5.00 × 104 A/cm2, they failed after only 0.6 hours by the melting of the composite solder bumps. Due to the precipitation and growth of Cu6Sn5 intermetallic compound at the cathode side, the Cu under bump metallurgy (UBM) was quickly consumed and followed by void formation at the contact area. The void reduced the contact area and displaced the electrical path, thus it affects greatly the current crowding and Joule heating inside the solder bump. A large Joule heating inside solder bumps can cause melting of the solder bump and the failure occurred quickly. The effect of void propagation on current crowding and Joule heating has been confirmed by simulation. View full abstract»

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  • Electromigration studies on Sn(Cu) alloy lines

    Page(s): 54 - 59
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    Cu alloying effect in Sn(Cu) solder line has been studied. We found that the SnO.7Cu solder line has the most serious EM damage than pure Sn and Sn3.0Cu solder lines. The dominant factor for the fast EM rate in SnO.7Cu could be attributed to the relatively small grain size and the low critical stress, i.e., the yielding stress of SnO.7Cu solder line. Also, we found that the shortest SnO.7Cu solder line, 250 μm, has most serious EM damage among three solder lines of different lengths. The back-stress induced by EM might not play a significant role on the EM test of long solder lines. A new failure mode of EM test, i.e., EM under an external tensile, was observed. The external stress would be superimposed on the stress profile induced by EM. As a result, the hillock formation at the anode side was retarded and void formation at the cathode was enhanced. View full abstract»

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  • Electromigration study on Cu-Sn interconnections

    Page(s): 60 - 62
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    This research concerns the influence of electron current on the diffusion of Sn and Cu in simple Cu-Sn and Cu-Sn-Cu diffusion couples. The diffusion couples are designed to permit in situ studies of the progress of diffusion. Initial tests were done in 60°C air with a current density of 1 × 104A/cm2. The results showed Cu movement into Sn in the direction of the electron current. With accompanying grain boundary sliding of the Sn grains. There is also evidence for Sn flow in the direction opposite the electron current. View full abstract»

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  • Electromigration in eutectic SnPb solder bumps with Ni/Cu UBM

    Page(s): 63 - 65
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    This study investigates the electromigration behavior of eutectic SnPb solder bumps with Ni/Cu UBM, in which the thickness of the Ni and Cu layer is 3 μm and 5 μm, respectively. It was found that the SnPb solder joints have better electromigration resistance than that of SnAg bumps with thin film UBM. The thermal characteristic of SnPb solder joints under current stressing was measured by infrared technique. The Joule heating effect was less serious due to the wide Al trace of 100 μm. Besides, a three-dimensional simulation on current density distribution was performed to examine the current crowding behavior in the joint. The results show that the current crowding occurs at the entrance point of the Al trace, which caused higher formation rate of intermetallic compounds there, and thus open failure occurred. View full abstract»

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  • Effect of electromigration on mechanical behavior of solder joints

    Page(s): 66 - 69
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2857 KB) |  | HTML iconHTML  

    The combination of electromigration effect and stress effect was investigated in lead free solder joints with a diameter of 300μm. One dimensional structures, metal (wire)-solder (ball)-metal (wire) was developed. Mechanical force and current could be applied serially or simultaneously. The current density of electromigration was 1∼5×103 A/cm2. The working temperature was 100-150°C. Tensile test and shear test were taken before and after electromigration to make the comparison. The tensile strain rate was 3μm/min. The experiment results show that, the samples broke at the middle of solder without applying current. However, after applying current of electromigration for 1 day, 2 days or longer, the failure always occurred at cathode interface. And the tensile strength was lower with longer electromigration time or higher current density. Shear test also illustrates the electromigration effect on mechanical property in composite solder joints. View full abstract»

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  • Improving die attach adhesion on metal leadframes via episulfide chemistry

    Page(s): 70 - 74
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    The objective of this study is to develop a basic understanding and practical approaches to achieve universal adhesion in metal leadframe packages. Universal die attach refers to a single die attach material that has excellent adhesion properties to Cu, Ag and Ni-Pd-Au substrates. Universal adhesion is a key element in achieving "universal die attach", which means that one single die attach can be applied onto different substrates (Cu, Ag and Ni-Pd-Au), all of which are commonly used in metal leadframe packages in semiconductor industry. The most difficult part of achieving universal adhesion is to achieve a good adhesion on Ag and Ni-Pd-Au by conventional adhesion promoters. In this study, a series of episulfide materials were synthesized, where episulfide moieties can be utilized as a latent thiol generator and can be cured in a similar way as epoxides. The adhesion properties of these materials were investigated through formulation testing, dynamic curing studies, surface analysis and fundamental characterization. We found episulfide indeed functioned as an adhesion promoter and improved cohesiveness of die attach adhesive on Ag and Ni-Pd-Au leadframes. The interactions between episulfide and the host resin system, and the stronger interfacial adhesion to metal leadframe by episulfide have contributed to these improvements. View full abstract»

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  • Electrical contact resistance of silver with different coatings

    Page(s): 75 - 78
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    The contact resistance between silver rods is measured when different contact load is applied. The relation of tunnel resistivity and contact pressure is found based on the contact area calculation from Hertzian solution. The tunnel resistivity of clean silver rods, and silver rods with different coatings, such as stearic acid, adipic acid, malonic acid, oxalic acid, terephthalic acid, un-cured and cured epoxy, are measured. The tunnel resistivity - contact pressure curves of silver with difference coatings are plotted. The measured tunnel resistivity of silver can be used to calculate the contact resistance between silver contacts in electrically conductive adhesives. View full abstract»

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  • No-bleed die attach adhesives

    Page(s): 79 - 81
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    Resin bleed out (RBO) is a major problem encountered when using die attach adhesives on metal or organic substrates or on top of another die. RBO to the edge of the substrate and/or onto the wire-bonding pad on a die, contaminates these surfaces. This hinders the formation of good wire-bonds between the die-top and the substrate or the wire-bonding fingers. The issue of resin bleed was tackled in three steps: First - understanding the nature of the surface (e.g. surface energy, roughness), and resin properties (e.g. viscosity, molecular weight, surface tension, polarity). Second - modelling the effect of the surface and liquid properties (input), on the adhesive performance (output). Third - design and develop new resins, based on the analysis, to reduce and eliminate resin bleed. View full abstract»

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  • Electrodeposition of polyurethane adhesive for MEMS application

    Page(s): 82 - 84
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    This paper presents a polymer electrodeposition process to prepare micro-size adhesive on electrically conductive substrates, and demonstrates its application for microelectromechanical systems (MEMS). UV-curable polyurethane latex was first formulated for cathodic electrodeposition process. Polyurethane was then conformally coated onto the conductive substrates by electrodeposition of polyurethane aqueous latex at 25 V for 1 minute. The coated polyurethane films is adherent, as a result it can be used as adhesive to bond other microstructures. The polyurethane adhesive can be further solidified by UV radiation for 2 minutes. Photolithography was used to pattern the conductive substrates with photoresist layer, which help to localize the polymer electrodeposition at specific surface locations. The deposited adhesive volume is able to be controlled in the magnitude of 10 femtoliters by adjusting the pattern size and the electrodeposition time. The electrodeposited polyurethane adhesive is useful for MEMS bonding. View full abstract»

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  • Stabilizing contact resistance of conductive adhesives on Sn surface by novel corrosion inhibitors

    Page(s): 85 - 89
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    Electrically conductive adhesives (ECAs) have been proposed as one of the major alternatives for tin/lead solders in electronic packaging. However, some critical limitations of this technology, such as lower electrical conductivity and unstable contact resistance during elevated temperature and humidity aging, have slowed its potentially wide applications in electronics industry. In this study, novel organic corrosion inhibitors were discovered and introduced into a typical ECA formulation. With the incorporation of small amount of the additives, much lower bulk resistivity of ECAs and significantly stabilized contact resistance on Sn surfaces could be achieved. Contact angle and FTIR characterization indicated the affinity and interaction between the corrosion inhibitors and the metal surfaces. Therefore, a barrier passivation layer could form on Sn surfaces for ECA with the effective corrosion inhibitors. X-ray diffraction analyses confirmed that such a passivation layer could protect the Sn surface and prevent oxidation and corrosion under the elevated temperature and humidity environment. View full abstract»

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  • Impact of different flip-chip bump materials on bump temperature rise and package reliability

    Page(s): 90 - 93
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    Recent trends in the semiconductor industry are driving a continuous increase in power dissipation, but require a lighter, more compact and thinner packaging technology. One of the concern areas is the increasing temperature of the C4 die bump. As the power continues to increase, the electrical current through the C4 die bump increases accordingly, resulting in increased bump temperature due to Joule self-heating and trace heating. The bump current density and temperature is now approaching levels where electromigration is a significant reliability concern. In order to fully understand and avoid this failure phenomenon, we need to know the C4 die bump temperature. However, the material property of the bump is also a major factor contributed to the bump temperature which must be evaluated. This paper discusses the methodology of measuring the C4 die bump temperature as well as results of our measurements. The experimental study includes variation of the bump current, the die power dissipation, different enabling thermal solutions and different bump materials. The experimental results show the effect of the Joule self-heating of the bump and the impact of the bump materials. View full abstract»

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  • Lead-free 0201 assembly and reliability

    Page(s): 94 - 99
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1909 KB) |  | HTML iconHTML  

    The many challenges with 0201 assembly can be attributed to the solder paste volume, pad design, aperture design, board finish, type of solder paste, pick and place and reflow profile. A design of experiment study was carried out to investigate the effects of these parameters on assembly defects and reliability. The test vehicles for the study consist of pad layouts for 2000-0201 components. Five different test vehicles were used, with the same pad layout and non-solder mask defined pads, with HASL, Ni/Au, pure tin (Sn), immersion silver (ImAg) and OSP finish. Four different pad shapes are designed on each of the test vehicles (rectangular, oval, modified home plate and double trapezoid). The pad areas for all four shapes are maintained the same. The pads are oriented both in the horizontal and vertical directions. Electroformed 3 mil and 4.65 mil thick stencils were used for printing the solder paste. The stencil was designed to obtain two distinct aperture-pad combinations (matched and unmatched). Three solder paste types (lead-based, lead-free and anti-tomstoning) were used in the study. Two test vehicles assembled for each experimental run, one with resistors and the other with capacitors, provided an understanding of the difference in the process for these two common passive devices. This paper discusses in detail the influence of a few key parameters and defects associated with them using both leaded and lead free solder alloys. The most recent data on shear test results after isothermal aging at 150°C are presented. View full abstract»

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  • Lead free solder process development and reliability for handset application

    Page(s): 100 - 104
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    Recent worldwide lead free activity has been driving international and US consumer electronic companies to be lead free. This paper identifies the challenges, critical issues and solutions for implementing lead free soldering process for handset application, and describes the studies conducted on Sn/Ag/Cu and Sn/Ag/Bi solder, process development and reliability results for handset manufacturing. The paper described wettability, printability and reflow results, electrical characterization, drop shock, thermal cycling test, humidity test and mechanical reliability results. Process DOE results are also discussed in the paper. Traditional eutectic solder is used as the baseline for comparison. View full abstract»

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  • Wafer bonding using fluxless process with Sn-rich Sn-Au dual-layer structure

    Page(s): 105 - 109
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    In many devices and packaging applications, it has been an engineering dream to be able to bond two entire wafers of the same material or of different materials with a thin metallic joint. Many new device concepts cannot be implemented because of the lack of this technology. An obvious idea to achieve this is to use solders. However, the need of using flux in the soldering process prohibits achieving void-free and uniform solder joint because flux and flux residues can be easily trapped in the joint, resulting in voids and uneven solder layer. Thus, it seems that a solution to this is to develop a soldering process that does not require the use of flux, i.e, fluxless or flux-free. In this paper, we report our initial success of bonding two 2-inch silicon wafers using Sn-rich Sn-Au dual-layer structure that is produced by electroplating process. No flux is used in the bonding process. It is much harder to achieve fluxless characteristic using Sn-rich Sn-Au alloys than Sn20Au80 eutectic alloy. The resulting Sn-rich solder joint layer, about 10 μm in thickness, is very uniform over the entire 2-inch sample. In the initial run, two samples are produced. The quality of the joint is examined using reflection-mode scanning acoustic microscope (SAM) and X-ray micro-imaging technique. Results of these two methods indicate that the joints are of high quality. Of these two samples, the better one shows nearly perfect joint with only 2% of possible void area. More studies and evaluation are needed to further extend this method to larger wafers and to wafer materials other than silicon. This initial success shows that it is indeed possible to bond entire wafers together with a thin metallic joint of high quality. View full abstract»

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  • Development of new surface finishing technology for PKG substrate with high bondability

    Page(s): 110 - 114
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    This paper describes the characteristics, development and application of the surface finishing technology for packaging substrate, especially electroless Ni/Pd/Au (nickel/palladium/gold). The palladium of this surface contains 5% of phosphorous and the crystal structure is minute and rigid. Both wire-bondability after high temperature storage and solderability with lead-free solder to the connecting pads applied this layer surface finishing are investigated. This surface finish has good wire bondability and excellent solderability that the conventional electrolytic nickel/gold have. Palladium layer effectively inhibits the diffusion of nickel metal from under layer. This surface finishing technology does not use plating buses, and the Ni/Pd/Au will confirm the increase of design flexibility for package substrate, downsizing of packages and decrease the electrical noises. This technology can be applied for the high performance SiP (System in a Package) and MCM (multichip module) etc. View full abstract»

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