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Norchip Conference, 2004. Proceedings

Date 8-9 Nov. 2004

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Title History

A modified shield-based test fixture for silicon-on-insulator (SOI) to mitigate the uncertainties of the parallel parasitics

Silicon self-switching-device based logic gates operating at room temperature

A novel 1V-supply, low power, wide tuning range voltage controlled oscillator implemented in 0.18μm CMOS technology

A phase noise analysis of CMOS colpitts oscillators

Efficient image filtering and information reduction in reconfigurable logic

Low-power reconfigurable baseband block for UMTS/WLAN transmitters

Low-phase-error and low-phase-noise 2GHz CMOS quadrature VCOs

Improving a network security system by recongurable hardware

Implementation experiments of analog nonvolatile memory with a standard 0.35 μm CMOS

An inductorless peaking technique applied to MOS current-mode logic gates

Analytical expression of the efficiency of phantom zero compensation applied on negative-feedback amplifiers

High-speed on-chip interconnect modeling for circuit simulation

Channel length as a design parameter for low noise wideband LNAs in deep submicron CMOS technologies

Analysis method of nonlinear self-heating ef fects based on simulated large signal spectra

Bridging concurrent and non-concurrent error detection in FIR filters

A 0.6 v 1.6 mW fully integrated voltage- controlled oscillator in 90 nm CMOS aiming for the GPS L1 band

A novel approach for implementation of adaptive learning rate neural networks

FPGA based fault emulation of synchronous sequential circuits

A low-power CMOS front-end for cuff-recorded nerve signals

A linear capacitive sensor interface circuit with single-ended to differential output capability

Ring road NoC architecture

Histogram based background correction of ADC

Injection locked coupled VCOs for low phase noise and high accuracy quadrature generation

Phase noise analysis of the LC-tank CMOS oscillator

Impact of oscillator power in discrete and continuous time ΣΔ converters

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