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Signal Propagation on Interconnects, 2004. Proceedings. 8th IEEE Workshop on

Date 9-12 May 2004

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Displaying Results 1 - 25 of 85
  • A frequency domain approach for efficient model reduction of mixed VLSI circuits

    Publication Year: 2004 , Page(s): 171 - 174
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (621 KB)  

    It has become well accepted that interconnect delay dominates gate delay in current VLSI circuits. This paper introduces a new method, based on a frequency domain approach, for the simulation of interconnect problems found in high speed digital circuits and SOC-AMS. View full abstract»

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  • Electromagnetic interference produced by printed dipole antennas for MCM wireless RF clock distribution

    Publication Year: 2004 , Page(s): 161 - 164
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (562 KB) |  | HTML iconHTML  

    The RF wireless interconnects are presented as an alternative solution to intra-chip clock distribution, which leads to severe power consumption and signal integrity limitations for over GHz digital applications. In this work, this concept is implemented in MCM package and board levels to meet the high-speed transmission performance. Miniaturized dipole antennas printed on high-K substrate are used and a good transmission gain is obtained for a separation distance of from 1 cm to 4 cm. In this paper, we focus our study in the analysis of the interferences generated by antennas used in the RF-wireless clock distribution. The parasitic coupling between antennas and multilayer interconnects is discussed for different configurations. View full abstract»

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  • Analysis of power delivery network constructed by irregular-shaped power/ground plane including densely populated via-hole

    Publication Year: 2004 , Page(s): 31 - 34
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (620 KB) |  | HTML iconHTML  

    Due to the high speed and low power trends, the design of the power distribution network (PDN) in multi-layer printed circuit board (PCB) becomes more important. This paper presents a fast and efficient analysis methodology for power/ground plane pair considering irregular shaped power plane and via effects in the frequency-domain. The proposed method uses parallel-plate transmission line theory and partitioning of the plane considering geometry properties. Using the popularly used circuit simulator SPICE, we have analyzed input-impedance of the power/ground plane pair. Due to the higher accuracy and the faster simulation time, the proposed method is applicable to the early design step of multi-layer PCB. Characteristic of power distribution network implemented by perforated plane is determined based on full-wave analysis using FDTD periodic structure modeling method. View full abstract»

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  • Effect of inductance on interconnect propagation delay in VLSI circuits

    Publication Year: 2004 , Page(s): 121 - 124
    Cited by:  Papers (4)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (523 KB) |  | HTML iconHTML  

    In the paper the analytical formula for the propagation delay of CMOS gate driving a distributed RLC line was derived. It is shown that obtained formula is more accurate in some cases than used in literature. The main idea of the presented approach is based on the expansion of the voltage unit step response into Taylor series. The coefficients of this expansion are calculated in symbolical manner in frequency domain as the moments determined for infinite frequency. View full abstract»

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  • Bounding bus delay and noise effects of on-chip inductance

    Publication Year: 2004 , Page(s): 167 - 170
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (608 KB) |  | HTML iconHTML  

    On-chip inductance depends on current return paths and is unreasonably computationally expensive to extract and model in the general case. A practical solution is to provide a well-defined power supply network so the current return paths are more predictable. This paper develops a model of bus delay and noise as a function of the physical dimensions of busses and the switching parameters. It applies this model to develop bounds on the inductive effects on delay and noise for on-chip busses in 180, 130 and 100 nm processes. If one power or ground line is interdigitated with every four bus lines, the RLC noise and delay are no more than 7% greater than RC models would predict. Designers may treat this delay and noise as small penalties for all busses rather than having to individually extract and model inductance on each bus. View full abstract»

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  • Effects of mode conversion on parasitic coupling in high-speed VLSI circuits

    Publication Year: 2004 , Page(s): 193 - 196
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (661 KB) |  | HTML iconHTML  

    The mode conversion means that a modification of the electromagnetic field configuration occurs, generally, after discontinuities. In deep submicron digital ULSI circuits, the mode conversion analysis is indispensable to identify the signal return path, the return current distribution and therefore, for an accurate inductance modelling which remains a challenging problem (Y. I. Ismael and E. G. Friedman, 2000). On the other hand, switching activity of high speed CMOS circuit may produce large current derivatives in wires (crosstalk) and substrate. These current transients can generate large potential surges and coupled noise. In this mind, a reduction of the mode conversion phenomenon decreases noise in high speed ULSI circuits (Y. Quere et al., 2003). We have investigated the mode conversion, in the frequency domain, for multiple-line inter-layer transitions in CMOS devices. The signal integrity analysis in time domain proved the detrimental effects of mode conversion. Finally, we confirmed that our design rule reduces the mode conversion phenomenon in the case of transition with multiple coupled lines. View full abstract»

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  • Cross-talk noise in repeater networks

    Publication Year: 2004 , Page(s): 77 - 80
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (622 KB) |  | HTML iconHTML  

    To avoid unjustified optimism in noise prediction in the absence of accurate analysis of switching activity, commercial tools have to make the most conservative assumption about aggressor switching which leads to an overly pessimistic result in situations of strongly correlated signals connected by repeaters. Such pessimism in the noise analysis hides out the effect of interleaved repeaters used to minimize noise in long, coupled interconnects. In the proposed approach we accurately analyze coupled networks with repeaters by considering timing and logical correlations, and multiple signal switching. We demonstrate an 81% reduction in the number of false noise violations in a design where interleaved repeaters are used for crosstalk critical global interconnects. View full abstract»

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  • A new in-situ approach to flip-chip interconnect characterization up to millimeter wave frequencies

    Publication Year: 2004 , Page(s): 59 - 62
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (799 KB) |  | HTML iconHTML  

    In this paper we present the performance of flip-chip interconnects up to 40 GHz based on an alternative non-destructive measurement technique. The presented method unfolds the raw flip-chip interconnect, excluding any launch structures for an actually mounted silicon chip. A preliminary modeling approach for chip-package co-design is outlined. View full abstract»

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  • Modelling the dynamic response of on-chip decoupling capacitors

    Publication Year: 2004 , Page(s): 39 - 42
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (619 KB) |  | HTML iconHTML  

    High-speed digital circuits require increasing amounts of on-chip decoupling capacitors (decaps) to preserve power integrity. Therefore, proper modelling and analysis of the dynamic response of such decaps in the high frequency range is needed. This paper shows that, in that range, lumped decap models fail and have to be substituted by distributed models. A derivation of such distributed model based on physical grounds is presented and compared with SPICE non-quasi static MOS models. View full abstract»

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  • Efficient GA-inspired macro-modeling of general LTI multi-port systems

    Publication Year: 2004 , Page(s): 95 - 98
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (617 KB) |  | HTML iconHTML  

    A numerically robust sampling and rational fitting method is introduced, that models the entire state-space matrix of multiple-input-multiple-output (MIMO) linear time-invariant (LTI) systems. The algorithm adaptively builds an accurate rational pole-residue model, based on a minimal set of support samples. During the modeling process, no prior knowledge of the system's dynamics is required. The "survival-of-the-fittest" principle of a genetic algorithm (GA) provides a reliable way to detect convergence of the modeling process. View full abstract»

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  • Crosstalk in product related bus systems using 110 nm CMOS technology

    Publication Year: 2004 , Page(s): 85 - 88
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (598 KB) |  | HTML iconHTML  

    The influence of the ground line position on the signal shape in the time domain is investigated in the presence of grounded substrates by M. F. Ktata et al. (2003) with different conductivities of 10 S/m (low) and 100 S/m (medium). It is shown that the impact of substrate effects on time domain signals depends on the substrate conductivity, on the relative position of the ground line with respect to the signal lines as well as on the length of the line system. In addition, the impact of process-related generated voids between closely spaced signal lines on crosstalk is investigated, too. View full abstract»

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  • Analysis of crosstalk coupling effects between aggressor and victim interconnect using two-port network model

    Publication Year: 2004 , Page(s): 81 - 84
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (618 KB) |  | HTML iconHTML  

    Signal integrity (SI) losses in the interconnects are the disturbances coming out of their distributed nature of parasitic capacitances, resistances, and inductances at high frequency operation by A. Attartha and M. Nourani (2002). SI losses are further aggravated if multiple interconnect lines couple energy from, or to each other. Therefore, this paper aims to analyze the cross-talk coupling effects between the two interconnects, namely the aggressor and victim lines, using the ABCD two-port network model. In order to reduce the simulation time a reduced order modeling of the interconnect line is considered. Furthermore, as stated in various literatures by A. Sinha et al. (1999) the rising (or falling) input signal represented by a simple step function is not accurate enough, therefore in this paper the rising transitions and the falling transitions are represented more accurately using the exponential terms, and based on such input representation the time domain output signal voltage in presence of crosstalk noise, at the far end side of both aggressor line and victim line, is determined. Such output voltage representation is very helpful in estimating the delay, overshoot or undershoot etc., which are believed to cause SI losses in the SoC. View full abstract»

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  • Issues and challenges of Gbps backplane connector characterization

    Publication Year: 2004 , Page(s): 63 - 66
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (730 KB) |  | HTML iconHTML  

    Current high-end inter-processor links run hundreds of signals at Gigabit per second data rates over one or two connectors and tens of inches of backplane. Suitable connectors have to fulfil tight crosstalk, reflection, and attenuation specifications. Accurate connector measurements and models are critical to the successful design of the whole link. However, due to high pin count and interdependencies with the backplane environment connector characterization is still a challenging task. Here, a 50 Ohm single-ended, pin-in-paste prototype connector system from ERNI is analyzed in detail. Comprehensive 3D full-wave EM simulations were done and compared to measurements. Several de-embedding techniques are presented to extract the connector response from the test environment. It will be shown that the connector footprint on the backplane has a major impact on the overall electrical performance. View full abstract»

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  • Influence of damping and voltage dependent leakage resistance on mid-frequency power noise

    Publication Year: 2004 , Page(s): 45 - 48
    Cited by:  Papers (2)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (624 KB) |  | HTML iconHTML  

    Accurate predictions of power/ground-noise are essential for adequate chip and package design. This paper studies especially the influence of damping and leakage on the mid-frequency power noise caused by switching activity variations of logic circuits. The noise is determined by simulations and calculated by a closed form expression which is derived for a simplified 2D circuit representation of the chip and package power delivery network. Both approaches agree within 16%. The voltage dependency of the leakage resistance is found to be essential for the power noise when the noise is determined by the resonance between on-die capacitors and the next stage of decoupling capacitors. It is shown that damping and leakage reduce significantly the influence of the on-die decoupling capacitance and package capacitor inductance on the mid-frequency power noise. View full abstract»

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  • A 0.18μm-CMOS near-end crosstalk (NEXT) noise canceller for 4-PAM/20Gbps throughput transmission over backplane channels

    Publication Year: 2004 , Page(s): 179 - 182
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (578 KB) |  | HTML iconHTML  

    This paper demonstrates an active near-end crosstalk (NEXT) noise canceller intended for use in commercial backplanes. Optimum system architecture and specifications are generated using measured channel data. Additionally, CMOS circuit implementation approaches are introduced and their performances are discussed. The NEXT canceller is applied to a 20Gbps 4-PAM signal over a 16-inch backplane channel and shows 75% cancellation. View full abstract»

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  • An enhanced transmission line model for full-wave analysis of interconnects in non-homogeneous dielectrics

    Publication Year: 2004 , Page(s): 21 - 24
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (632 KB) |  | HTML iconHTML  

    An enhanced transmission line model has been recently proposed by the authors to perform the full-wave analysis of high-frequency interconnects. Such a model, while retaining the same simplicity of a transmission line model, describes accurately the case where the signal characteristic wavelength is comparable to the interconnect transverse dimension. The model has been obtained from an integral formulation of the propagation problem by using electromagnetic potentials with Lorenz gauge, with reference to a pair of cylindrical wires in homogeneous dielectric. Here the model is extended to interconnects with arbitrary cross-sections, embedded in a non-homogeneous dielectric. The main difference is in the reformulation of the problem by adding new unknowns (the polarization charges and displacement currents of the dielectrics), so that the potential may still be expressed through the Green function of the free space. View full abstract»

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  • PEEC methods in 2D signal line modeling for mid-frequency on-chip power supply noise simulations

    Publication Year: 2004 , Page(s): 49 - 52
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (559 KB) |  | HTML iconHTML  

    In this paper a 2D signal line model is used to simulate the power distribution network (PDN). The proposed method uses an admittance function to model the frequency-dependent resistance and inductance in each direction. This admittance function can be gained directly by model order reduction from a partial element equivalent circuit (PEEC) model. Hence, it is possible to efficiently calculate the model parameters even for irregular PDNs. A fast transient simulation algorithm closely related to the finite-difference time-domain (FDTD) schemes is presented. The alternating-direction-implicit (ADI) method relaxes the time step for the simulation, because it is not limited by a stability criterion. View full abstract»

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  • Presentation of a new time domain simulation tool and application to the analysis of advanced interconnect performance dependence on design and process parameters

    Publication Year: 2004 , Page(s): 17 - 20
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (604 KB) |  | HTML iconHTML  

    The speed of integrated circuits is increasingly fixed by interconnect performances. To address this issue, the development of new back-end of line technology schemes and materials should be driven by predictions of associated benefits. A new tool was developed and coupled to electromagnetic software to carry out time domain simulations. As a result, the dependences of interconnect performances on process parameters and design rules were extracted for the 65 nm and 45 nm technology nodes. View full abstract»

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  • Investigating the global suppression of the power/ground plane noise

    Publication Year: 2004 , Page(s): 209 - 210
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (513 KB) |  | HTML iconHTML  

    In this paper, the global suppression of the power/ground noise induced by a transient current on vias within a parallel-plate power distribution system is studied. Two different methods of noise suppression, i.e. differential via routing and application of an electromagnetic bandgap (EBG) structure, are investigated. The latter offers noise suppression in all azimuthal directions, while the noise suppression achieved by differential routing depends on the location of the observation point and improves at farther distances from the source. View full abstract»

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  • Nontransversal electrostatic fields in cable models

    Publication Year: 2004 , Page(s): 145 - 148
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (630 KB) |  | HTML iconHTML  

    Potentials of electrostatic fields in models of straight shielded cables are often assumed to be cylindrical (i.e., independent of the coordinate in axial direction of the cable). We give a rigorous motivation for this assumption. From the boundary conditions at the cable ends of shielded cables there result deviations of the potential from the cylindrical potential in the proximity of the cable ends. Such deviations were firstly introduced as residual potentials by us at ISTET '03. Here, we present new optimized estimations for residual potentials. To a nontrivial residual potential, there corresponds nontransversal electrostatic field strength, denoted as residual field strength. For the first time, we discuss an estimation of the residual field strength along the conductors of a cable model in this paper. View full abstract»

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  • Screening attenuation of differential cable-connector assemblies

    Publication Year: 2004 , Page(s): 175 - 178
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (667 KB) |  | HTML iconHTML  

    High speed data transmission is now required in many applications. One limiting factor on speed can be radiated emissions. This paper presents simulation and measurement results on electromagnetic leakage of various differential cable connector assemblies. Leakage modelling aspects are also considered. Differential and common mode interferences as well as single and double shielded assemblies where grounding pin number directly connected to the cable screen varies are studied. The research methods are FIT simulations and absorbing clamp measurements. It is shown that the symmetry of the differential shielding is important and to suppress common mode interferences high amount of grounding pins is required when unscreened connectors like typical high-speed digital ones are used. Double shielded assemblies leak much less. View full abstract»

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  • Non-uniform grid (NG) algorithm for fast capacitance extraction

    Publication Year: 2004 , Page(s): 109 - 112
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (600 KB) |  | HTML iconHTML  

    A novel approach for computing the capacitance matrices of arbitrary shaped three-dimensional geometries is presented. The proposed approach combines an iterative solution of the pertinent integral equations with the non-uniform grid (NG) algorithm for fast evaluation of potentials due to given source distributions. The NG approach is based on the observation that locally the potential produced by a finite size source can be interpolated from its samples at a small number of points of a non uniform spherical grid. This observation leads to a multilevel algorithm comprising interpolation and aggregation of potentials. The resulting hierarchical algorithm attains an O(N) asymptotic complexity. View full abstract»

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  • Behavioral macromodels of differential drivers

    Publication Year: 2004 , Page(s): 131 - 134
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (618 KB) |  | HTML iconHTML  

    This paper addresses the development of behavioral macromodels of differential drivers for the assessment of signal integrity and electromagnetic compatibility effects in high-speed digital systems. The obtained macromodels are readily implemented as SPICE-like subcircuits to be included in any circuit simulation environment. Accuracy and efficiency of macromodels are assessed by applying the proposed methodology to actual differential devices. View full abstract»

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  • Black-box modelling by rational function approximation

    Publication Year: 2004 , Page(s): 99 - 102
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (543 KB) |  | HTML iconHTML  

    In this paper, a rational function approach is used to approximate the transfer function of linear systems characterized by sampled data. The ill-conditioned Vandermonde-like matrix associated with the ordinary power series is avoided by using Chebyshev polynomials. Clenshaw's recurrence algorithm is applied in transforming the Chebyshev coefficients to the ordinary power series. The passivity of the system is enforced through certain constraints on the residues. View full abstract»

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  • Crosstalk bounds in interconnects with random parameters

    Publication Year: 2004 , Page(s): 197 - 200
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (568 KB) |  | HTML iconHTML  

    In this paper a method to determine upper and lower bounds for crosstalk signals in interconnects is presented. Assuming a quasi TEM propagation interconnects are modeled as transmission lines whose equivalent circuit is considered. From the frequency response of the equivalent circuit the dependence of the far end voltages on lines parameter is derived and the interval of variation is determined. Considering uncertain geometric characteristic of a simplified but meaningful geometry results have been obtained showing that the derived bounds accurately confine the actual space of variation of the crosstalk signals. View full abstract»

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