Proceedings of International Workshop on Modeling, Analysis and Simulation of Computer and Telecommunication Systems

31 Jan-2 Feb 1994

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Displaying Results 1 - 25 of 80
  • XMGM: performance modeling using matrix geometric techniques

    Publication Year: 1994, Page(s):152 - 157
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (472 KB)

    Over the last two decades a considerable amount of effort has been put in the development and application of matrix geometric techniques for the analysis of queueing systems of which the (embedded) Markov chain exhibits a regular structure. Most of this work however has been presented in either a mathematical context or an a purely application-oriented context. In this paper we present XMGM, a per... View full abstract»

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  • A performance study of the RPE mechanism for PDES

    Publication Year: 1994, Page(s):214 - 220
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (732 KB)

    We present the latest implementation of our Remote Process Execution (RPE) mechanism for parallel discrete-event simulation (PDES), along with results of an empirical study of its performance. RPE is an optimistic time warp based mechanism, which allows logical processes on one processor to execute remotely on another when the former is lagging behind in the computation. The advantage is that proc... View full abstract»

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  • Modeling data migration on CC-NUMA and CC-COMA hierarchical ring architectures

    Publication Year: 1994, Page(s):159 - 163
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB)

    Parallel computing performance on scalable shared-memory architectures depends primarily on the structure of the interconnection networks linking processors to memory modules and on the efficiency of the memory/cache management systems. While Cache Coherence Non-Uniform Memory Access (CC-NUMA) and Cache Only Memory Access (CC-COMA) are two effective memory systems, and the hierarchical ring struct... View full abstract»

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  • Object-oriented modeling, simulation and implementation of a network management system

    Publication Year: 1994, Page(s):222 - 228
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (576 KB)

    Development of a network management system for B-ISDN access products proceeded through a modelling phase at a high level of abstraction, followed by implementation in an expert-system shell dedicated to network management. The expert-system shell provides the opportunity to exercise the system in simulation mode. The object-oriented paradigm is used for modelling, implementation and simulation. S... View full abstract»

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  • ES: a tool for predicting the performance of parallel systems

    Publication Year: 1994, Page(s):164 - 168
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (448 KB)

    ES is a tool for estimating the execution times of parallel algorithms on MIMD parallel systems. ES allows the user to model arbitrary task execution times, explicit task precedence and synchronization constraints, resource contention among tasks, and a variety of scheduling policies for shared resources. Given a model of a parallel algorithm and a parallel system, ES constructs a sequencing tree ... View full abstract»

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  • Parallel simulation of Markovian queueing networks

    Publication Year: 1994, Page(s):35 - 36
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (160 KB)

    Consider simulating a large queueing network, i.e., one with many queues and jobs, on a parallel computer. Suppose the network is partitioned so that each processor is assigned a set of queues to simulate. The basic difficulty in parallel simulation is synchronizing the simulation clocks on each of the processors so that events appear to get executed in the proper order. If the network possesses a... View full abstract»

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  • Synchronous digital hierarchy network modeling

    Publication Year: 1994, Page(s):229 - 233
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (408 KB)

    Due to the complexity of Synchronous Digital Hierarchy (SDH) networks, planning and developing such networks requires computer aided design tools. Because survivable SDH network design is a relatively new area and the need for planning tools has only been recognized in the last few years, virtually no comprehensive tools exist to address the specific questions which must be answered by SDH network... View full abstract»

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  • Efficient technique for performance analysis of locking protocols

    Publication Year: 1994, Page(s):276 - 283
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (476 KB)

    The validity of many analytic studies of the performance of database systems are often hampered by the many approximations made. This is especially true of the way the block queue delays and deadlocks have been handled. An efficient approach to the derivation of the blocking delays of transactions under the static and dynamic two phase locking protocols is given. The problem of deadlocks which has... View full abstract»

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  • Performance of multiple-bus multiprocessor under non-uniform memory reference

    Publication Year: 1994, Page(s):169 - 173
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (384 KB)

    Performance evaluation of multiple-bus multiprocessor systems is usually carried out under the assumption of uniform memory reference model. The objective of this paper is to study the performance of multiple bus multiprocessor system in the presence of hot spots. Analytical expressions for the average memory bandwidth and probability of acceptance of prioritized processors have been derived. Two ... View full abstract»

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  • A methodology for generation and collection of multiprocessor traces

    Publication Year: 1994, Page(s):417 - 418
    Cited by:  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (180 KB)

    The authors describe a trace collection system that provides complete, accurate, and long traces. A methodology for generating multiprocessor traces from uniprocessor traces is presented, and the implementation of a multiprocesser simulator is discussed. Some programs that contain multiple processes with synchronization information have been run on a uniprocessor system to collect traces utilizing... View full abstract»

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  • Modeling, performance evaluation, and ordinal optimization of integrated voice/data networks

    Publication Year: 1994, Page(s):37 - 41
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (452 KB)

    The evaluation of data-packet delay in integrated networks is a difficult problem because the quantity of network resources available for data traffic is time varying and dependent on the voice traffic. We demonstrate that an extremely simple model for data-packet delay, although inaccurate in terms of delay measurements, can provide a remarkably accurate ranking among a number of different contro... View full abstract»

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  • Evaluation of write-back caches for multiple block-sizes

    Publication Year: 1994, Page(s):57 - 61
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (468 KB)

    Trace-driven simulation of cache memories usually requires enormous disk space to store CPU trace data. On-the-fly simulation avoids this problem by running the simulation while the trace data is being generated. For write-back least-recently-used (LRU) caches, we propose an on-the-fly simulation method, which is a variant of the standard one-pass stack evaluation techniques that evaluates write r... View full abstract»

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  • Modeling to obtain the effective bandwidth of a traffic source in an ATM network

    Publication Year: 1994, Page(s):318 - 322
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (264 KB)

    Describes and compares two classes of approaches to estimating the effective bandwidth of a traffic source of fixed-length packets (cells) in a high-speed network. In one class of approaches, the arrival times of the source are monitored and modeled by, e.g., a Markov-modulated Poisson process; the effective bandwidth of the model is then used to estimate that of the source. In the other class of ... View full abstract»

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  • From simulation to virtual reality a robotic application

    Publication Year: 1994, Page(s):351 - 355
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (260 KB)

    Based on a simulation system for factory workcell optimization and offline programming of kinematic systems a software interface for realtime coupling to processes is presented. Robotic components are available in the real work-cell whose controllers offer high speed interfaces for realtime path modification. Both subsystems can be connected via a communication managing computer to improve from si... View full abstract»

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  • The knitting technique and its application to communication protocol synthesis

    Publication Year: 1994, Page(s):234 - 238
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (380 KB)

    The Petri net (PN) can be incrementally expanded by adding paths of nodes according to the synthesis rules. These paths of nodes are generated to increase the number of concurrent, conditional, and iterative processes. A set of synthesis rules has been developed to ensure the correct generation of these paths of nodes. The advantages of these rules include the possibility of implementation as a CA... View full abstract»

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  • Coreference detection in automatic analysis of specifications

    Publication Year: 1994, Page(s):409 - 410
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (180 KB)

    An English language description of a system is typically composed of many English sentences. Consider that each English language sentence is parsed and stored in the form of a conceptual graph that represents the semantics of the sentence. Since each of these conceptual graphs carries information only about the sentence it represents, the set of conceptual graphs must be “joined” logic... View full abstract»

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  • Visualization and performance analysis of formally specified communication protocols

    Publication Year: 1994, Page(s):284 - 291
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (724 KB)

    There is an increasing interest in developing performance enhanced extensions of standardised FDTs. We present how simulation and visualization of performance-extended formal specifications can be efficiently supported by the use of a high-level simulation environment. Requirements for selection of a proper environment are formulated and the design principles for a software package, built on top o... View full abstract»

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  • VHDL modeling for the performance evaluation of multicomputer networks

    Publication Year: 1994, Page(s):174 - 178
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (404 KB)

    This paper describes the use of VHDL for performance evaluation. VHDL simulation is coupled with support programs that supply statistical workloads and derive performance results for multicomputer networks. Models for node processing and communication using wormhole routing are described. Methods for extracting performance data from simulation results are presented. Example results are provided to... View full abstract»

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  • IDtrace-a tracing tool for i486 simulation

    Publication Year: 1994, Page(s):419 - 420
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (156 KB)

    The authors describe IDtrace, a binary instrumentation tool which produces execution traces for the ix86 instruction set architecture. Long execution traces can be generated quickly and easily for input to a wide variety of performance evaluation tools. Issues involved in the construction of such a tool are listed along with illustrations of the uses of different generated traces. One example obse... View full abstract»

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  • Towards the automatic derivation of computer performance models from the real time and embedded systems design

    Publication Year: 1994, Page(s):397 - 398
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (196 KB)

    Real-time and embedded systems always have performance constraints. With conventional design techniques, these constraints are verified at the testing phase and the designer does no performance constraint estimation during the design. From the design information, it is possible to deduce a queueing network performance model, but its execution requires supplementary information concerning estimatio... View full abstract»

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  • An analysis of space priority queueing in ATM switches

    Publication Year: 1994, Page(s):74 - 78
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB)

    High-speed packet switched networks such as B-ISDN require algorithms to manage the flow of traffic into and through the network. End-to-end congestion control algorithms will do much to ensure that overload periods are minimized, but intelligent buffering decisions at internal nodes may aid in managing congestion by shifting cell loss to lower priority traffic. The authors describe a simulation s... View full abstract»

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  • MINT: a front end for efficient simulation of shared-memory multiprocessors

    Publication Year: 1994, Page(s):201 - 207
    Cited by:  Papers (102)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (648 KB)

    MINT is a software package designed to ease the process of constructing event-driven memory hierarchy simulators for multiprocessors. It provides a set of simulated processors that run standard Unix executable files compiled for a MIPS R3000 based multiprocessor. These generate multiple streams of memory reference events that drive a user-provided memory system simulator. MINT uses a novel hybrid ... View full abstract»

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  • Trace-driven simulation of data alignment and other factors affecting update and invalidate based coherent memory

    Publication Year: 1994, Page(s):44 - 51
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (524 KB)

    The exploitation of locality of reference in shared memory multiprocessors is one of the most important problems in parallel processing today. Locality can be managed in several levels: hardware, operating system, runtime environment of the compiler, and user level. In this paper we investigate the problem of exploiting locality at the operating system level and its interactions with the compiler ... View full abstract»

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  • Methodology for LAN modeling and analysis using Petri nets based models

    Publication Year: 1994, Page(s):335 - 342
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (804 KB)

    The goal of this paper is to present a methodology for modeling and analyzing the main characteristics of time critical distributed systems. This methodology is presented through the study of the fieldbus FIP and is based on the use of two complementary Petri nets based models: the labeled predicate transition nets (LPrT) which are well adapted for representing complex communication systems, but w... View full abstract»

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  • Performance of output-multibuffered multistage interconnection networks under non-uniform traffic patterns

    Publication Year: 1994, Page(s):405 - 406
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (156 KB)

    The objective of the authors is to develop an analytical model to evaluate the throughput and packet delay, in the presence of nonuniform traffic, in a MIN having multiple buffers at the output of the switching elements. The model is based on Markov chains, and uses several simplifying assumptions to make the model tractable. The validity of the model has been verified by comparison of the results... View full abstract»

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