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Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on

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Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. IEEE International Conference on

Date 11-13 Oct. 2004

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Title History

Functional Illinois scan design at RTL

Best of both latency and throughput

A fast delay analysis algorithm for the hybrid structured clock network

Graph automorphism-based algorithm for determining symmetric inputs

A flexible data structure for efficient buffer insertion

Fetch Halting on critical load misses

Compressed embedded diagnosis of logic cores

Asynchronous scan-latch controller for low area overhead DFT

A novel low-power scan design technique using supply gating

Power-aware deterministic block allocation for low-power way-selective cache structure

Layout driven optimization of datapath circuits using arithmetic reasoning

A general post-processing approach to leakage current reduction in SRAM-based FPGAs

A two-layer bus routing algorithm for high-speed boards

Implementation of fine-grained cache monitoring for improved SMT scheduling

Digital integrated circuit testing for art historians and test experts

Analyzing power consumption of message passing primitives in a single-chip multiprocessor

XTalkDelay: a crosstalk-aware timing analysis tool for chip-level designs

Frontend frequency-voltage adaptation for optimal energy-delay²

Potential slack budgeting with clock skew optimization

An automatic test pattern generation framework for combinational threshold logic networks

A depth-first-search controlled gridless incremental routing algorithm for VLSI circuits

Extending the applicability of parallel-serial scan designs

Hardware/software co-modeling of SAT solver based on distributed computing elements using SystemC

A minimal dual-core speculative multi-threading architecture

Fine-grain abstraction and sequential do not cares for large scale model checking

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