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Computer-Aided Design, 1992. ICCAD-92. Digest of Technical Papers., 1992 IEEE/ACM International Conference on

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Computer-Aided Design, 1992. ICCAD-92. Digest of Technical Papers., 1992 IEEE/ACM International Conference on

Date 8-12 Nov. 1992

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Title History

Hazard-non-increasing gate-level optimization algorithms

Exact two-level minimization of hazard-free logic with multiple-input changes

A comparative study of design for testability methods using high-level and gate-level descriptions

Behavioral synthesis for easy testability in data path scheduling

Behavioral synthesis for testability

Area minimization for general floorplans

Three-phase chip planning-an improved top-down chip planning strategy

Accurate net models for placement improvement by network flow methods

SHILPA: a high-level synthesis system for self-timed circuits

Automatic gate-level synthesis of speed-independent circuits

Automatic synthesis of 3D asynchronous state machines

COMPACTEST-II: a method to generate compact two-pattern test sets for combinational logic circuits

An efficient non-enumerative method to estimate path delay fault coverage

Test generation for delay faults in non-scan and partial scan sequential circuits

DAMOCLES: an observer-based approach to design tracking

Incorporating design flow management in a framework based CAD system

DECOR-tightly integrated design control and observation

Precise timing verification of logic circuits under combined delay model

Valid clocking in wavepipelined circuits

Exploiting multi-cycle false paths in the performance optimization of sequential circuits

Performance optimization of sequential circuits by eliminating retiming bottlenecks

Assignment of global memory elements for multi-process VHDL specifications

Synthesis of the hardware/software interface in microcontroller-based systems

A partitioning algorithm for system-level synthesis

Design of system interface modules

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