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IEEE Transactions on Circuits and Systems II: Express Briefs

Issue 3 • March 2018

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Displaying Results 1 - 25 of 33

Publication Year: 2018, Page(s):C1 - C4
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• IEEE Transactions on Circuits and Systems - II: Express Briefs publication information

Publication Year: 2018, Page(s): C2
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• Analog and Mixed Mode Circuits and Systems
• A 0.4-V Miniature CMOS Current Mode Instrumentation Amplifier

Publication Year: 2018, Page(s):261 - 265
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This brief presents a new low-power miniature instrumentation amplifier based on the operational floating current conveyor (OFCC). The OFCC is a general-purpose current mode device capable of realizing all functions as an operational amplifier. The proposed OFCC is designed and implemented in both TSMC low-power 90-nm and UMC high-speed 130-nm CMOS technology for use in low-voltage applications. A... View full abstract»

• Single-Stage Amplifier Biased by Voltage Combiners With Gain and Energy-Efficiency Enhancement

Publication Year: 2018, Page(s):266 - 270
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This brief presents the design of a single-stage amplifier with enhanced gain and speed, without the need for using any cascode devices, positive feedback, or feed forward technique. Instead, two voltage-combiners replace the traditional tail current source, commonly employed to bias the differential pair. The resultant topology shows both additional dc gain and a gain bandwidth product enhancemen... View full abstract»

• Multi-Stub-Loaded Differential-Mode Planar Multiband Bandpass Filters

Publication Year: 2018, Page(s):271 - 275
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A new type of RF $/$ microwave differential-mode planar multiband bandpass filters (BPFs) are presented. Each symmetrical half of the proposed balanced filtering architecture is composed of the in-series cascade of $K$ View full abstract»

• A Fast-Locking All-Digital Multiplying DLL for Fractional-Ratio Dynamic Frequency Scaling

Publication Year: 2018, Page(s):276 - 280
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A new all-digital multiplying delay-locked loop (MDLL) is presented that can provide programmable fractional-ratio frequency synthesis of a de-skewed clock. The proposed fractional-ratio MDLL (FMDLL) employs a new select logic for controlling three operation modes and utilizes a new phase-detecting structure to achieve inherent cancellation of the internal phase offset. The proposed digital FMDLL ... View full abstract»

• A 65 nm 0.08-to-680 MHz Low-Power Synthesizable MDLL With Nested-Delay Cell and Background Static Phase Offset Calibration

Publication Year: 2018, Page(s):281 - 285
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This brief presents a wide frequency-range synthesizable multiplying delay-locked-loop with a proposed nested delay cell. Operating in two different modes, the clock generator synthesizes output frequency that ranges from 80 kHz to 680 MHz. Owing to the synthesized finely controlled charge pump and phase detector with background offset calibration, the prototype clock generator achieves a 5.2 ps i... View full abstract»

• A Multi-Cycle Switching Technique for Efficient Ultrasonic Wireless Power Delivery

Publication Year: 2018, Page(s):286 - 290
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A multi-cycle switching technique is proposed for efficient ultrasonic power delivery by providing dc-level shifting and load transformation in the receiver (Rx) side. This technique can increase the power delivery efficiency in the Rx and achieve larger voltages across the load ( ${R_{L}}$ ). In the proposed switching scheme, ... View full abstract»

• An Input-Feedforward Delta-Sigma Modulator With Relaxed Timing Constraints

Publication Year: 2018, Page(s):291 - 295
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To relax timing constraints of the input-feedforward delta-sigma modulator, this brief presents a general modulator architecture and its circuit implementation. At system level, a half-cycle delay is split from the loop filter through equivalent transformation. It is then shifted to the input and the feedback paths so that the half-cycle delay in the input path shares one-clock phase with the anal... View full abstract»

• A 130 nm 165 nJ/frame Compressed-Domain Smashed-Filter-Based Mixed-Signal Classifier for “In-Sensor” Analytics in Smart Cameras

Publication Year: 2018, Page(s):296 - 300
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To avoid data deluge at the back end, it is imperative that advanced sensor nodes perform “in-sensor” processing to extract relevant features from data. We propose a compressed-domain smashed-filter-based object recognition system and measurements from a 130 nm mixed-signal test chip to demonstrate reconfigurable and ultra-low power operation. We measure greater than 90% accur... View full abstract»

• Capacitance Super Multiplier for Sub-Hertz Low-Pass Integrated Filters

Publication Year: 2018, Page(s):301 - 305
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This brief addresses the design of tunable integrated low-pass filters for sub-Hertz frequencies. The required very large time constants are obtained by using the transconductance of MOS transistors with extremely low bias current and integrated capacitors whose value is augmented by a novel super multiplier circuit. Simulations at the transistor level using a 65-nm CMOS technology verify the effe... View full abstract»

• Supply-Doubled Pulse-Shaping High Voltage Pulser for CMUT Arrays

Publication Year: 2018, Page(s):306 - 310
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A supply-doubled pulse-shaping high voltage (HV) pulser is presented for medical ultrasound imaging applications, particularly those that use capacitive micromachined ultrasonic transducers (CMUTs). The pulser employs a bootstrap circuit combined with dynamically biased stacked transistors, which allow HV operation above process limit without lowering device reliability. The new pulser overcomes s... View full abstract»

• Transient Input Impedance Modeling of Rectifiers for RF Energy Harvesting Applications

Publication Year: 2018, Page(s):311 - 315
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This brief presents a model for the input impedance of the RF rectifiers during charging. It uses a power-based method and finds a closed form equation for the transient variation of the input impedance. To validate the model, a typical single stage rectifier is designed using Schottky diodes and simulated at 900 MHz using ADS. The simulation results show a good agreement with the proposed model. ... View full abstract»

• Multiparameter Sensor Interface Circuit With Integrative Baseline/Offset Compensation by Switched-Capacitor Level Shifting/Balancing

Publication Year: 2018, Page(s):316 - 320
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The proposed sensor interface circuit provides an integrative baseline/offset compensation to give higher adaptability and effectiveness for multiparameter sensing microsystems. Capacitive/resistive and voltage type sensors are dealt with and switched-capacitor-based circuits are mostly employed to facilitate integrative baseline/offset cancellation and interface various types of sensors. For inte... View full abstract»

• A Generalized Lower Bound on the Bit Error Rate of DCSK Systems Over Multi-Path Rayleigh Fading Channels

Publication Year: 2018, Page(s):321 - 325
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This brief presents a generalized closed-form expression of the lower bound on the bit error rate (BER) of differential chaos-shift-keying (DCSK) systems. The analytical expressions are derived for multi-path Rayleigh fading channels. Unlike already existing research work, where numerical integration is the only way forward to derive the average BER for DCSK systems, this brief provides a generali... View full abstract»

• A Simplified Transistor-Based Analog Predistorter for a GaN Power Amplifier

Publication Year: 2018, Page(s):326 - 330
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A simplified transistor-based analog predistorter (APD) is proposed and used to linearize a GaN power amplifier (PA). The proposed APD features simple circuit topology because no additional vector modulator is needed. To demonstrate the new methodology, a GaN power amplifier centered at 2.4 GHz using the proposed APD is implemented and tested. From the measurement results, the output 1-dB gain com... View full abstract»

• Virtual Channel Optimization for Overloaded MIMO Systems

Publication Year: 2018, Page(s):331 - 335
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In this brief, we present a virtual channel (VC) optimization approach for overloaded multiple-input multiple-output (MIMO) systems. With this approach, a VC vector is generated at the transmitter, which is combined with the actual wireless channel matrix to form the overall transmission channel matrix. Through VC optimization, the overall transmission channels can be properly adjusted in favor of... View full abstract»

• Digitally Assisted RF-Analog Self Interference Cancellation for Wideband Full-Duplex Radios

Publication Year: 2018, Page(s):336 - 340
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This brief presents a new approach to cancelling self-interference in full-duplex radios. By augmenting minimal-complexity analog cancellation hardware using a radio frequency vector multiplier with the flexibility and effectiveness of a digital baseband rational function finite impulse response (FIR) filter, the proposed approach enables excellent cancellation performance over a wide modulation b... View full abstract»

• Control Theory and Systems
• Fixed-Time Disturbance Observer Design for Brunovsky Systems

Publication Year: 2018, Page(s):341 - 345
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This brief presents a fixed-time disturbance observer for Brunovsky systems. The proposed disturbance observer is composed of a uniform convergent part and a finite time convergent part. The uniform convergent part first drives the estimation error trajectories into a compact set containing the origin and then the finite time convergent part achieves exact disturbance estimation. The proposed dist... View full abstract»

• Power Systems and Electronic Circuits
• Recognition and Vulnerability Analysis of Key Nodes in Power Grid Based on Complex Network Centrality

Publication Year: 2018, Page(s):346 - 350
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The analysis of blackouts, which can inevitably lead to catastrophic damage to power grids, helps to explore the nature of complex power grids but becomes difficult using conventional methods. This brief studies the vulnerability analysis and recognition of key nodes in power grids from a complex network perspective. Based on the ac power flow model and the network topology weighted with admittanc... View full abstract»

• Non-Isolated Single-Inductor DC/DC Converter With Fully Reconfigurable Structure for Renewable Energy Applications

Publication Year: 2018, Page(s):351 - 355
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A novel non-isolated three-port converter (NITPC) is introduced in this brief. The purpose of this topology is to integrate a regenerative load such as DC bus and motor with dynamic braking, instead of the widely reported consuming load, with a photovoltaic (PV)-battery system. Conventional methods require either a separate DC–DC converter to process the reversible power flow or employing a... View full abstract»

• Exponential Stability Analysis and Stabilization for Continuous Time-Delay Systems With Controller Failure

Publication Year: 2018, Page(s):356 - 360
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In this brief, we study the problem of controller synthesis for time-delay systems with controller failures based on an input–output approach. First, the time-delay system with controller failure is modeled as an input–output form. Next, the stability condition of the system with controller failure is developed via scaled small gain theorem. Additionally, the proposed stability condi... View full abstract»

• Digital Circuits and Systems and VLSI
• Energy-Efficient Scheme for Multiple Scan-Chains BIST Using Weight-Based Segmentation

Publication Year: 2018, Page(s):361 - 365
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This brief presents a weighted-based cell segmentation algorithm for a multiple scan-chains built-in self-test in order to reduce the average power consumption when scanning new test vectors and to reduce the test application time. The proposed technique is based on selecting the best group of cells to be connected in the same scan-chain. This group of cells should have the same or very close weig... View full abstract»

• Efficient Fault-Tolerant Design for Parallel Matched Filters

Publication Year: 2018, Page(s):366 - 370
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Parallel matched filters (PMFs) are widely used in digital communication systems for efficient timing synchronization. In this brief, an efficient fault-tolerant design is proposed for PMFs. In the proposed scheme, the correlation between the different filters is used for fault detection and recovery, so that the redundant filters that are needed in existing solutions can be removed, which reduces... View full abstract»

• Secure and Lightweight Compressive Sensing Using Stream Cipher

Publication Year: 2018, Page(s):371 - 375
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We are proposing a lightweight and secure compressive sensing (CS) method for compression of data generated by image sensors. This method simultaneously compresses and encrypts image and video files, thereby reducing communication cost, storage space, runtime, and power/energy overhead. Our proposed method combines the CS technique with stream cipher to implement the secure CS. Furthermore, the us... View full abstract»

Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org