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Digital and Computational Video, 2002. DCV 2002. Proceedings. Third International Workshop on

Date 15-15 Nov. 2002

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Displaying Results 1 - 25 of 29
  • Proceedings Third International Workshop on Digital and Computational Video. DCV 2002 (Cat. No.02EX724)

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  • Author index

    Page(s): 217
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    Freely Available from IEEE
  • An MPEG-4 FGS-based statistical multiplexer

    Page(s): 143 - 150
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    We present a novel fine granular scalability (FGS)-based statistical multiplexing scheme for video broadcasting. In the light of our statistical study on intra- and inter-layer correlation, we develop a simple but efficient statistical multiplexing algorithm based on the proposed fairness criterion and smoothness constraint. Simulation results show effectiveness of the proposed statistical multiplexer in terms of high multiplexing efficiency, high bandwidth utilization, fairness and smoothness. View full abstract»

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  • An analysis of Daubechies discrete wavelet transform based on algebraic integer encoding scheme

    Page(s): 27 - 34
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (721 KB) |  | HTML iconHTML  

    A new and novel encoding scheme of Daubechies wavelet coefficients for implementing discrete wavelet transform based on algebraic integer is proposed. This encoding technique eliminates the requirements to approximate the transformation matrix elements. Instead of approximating the matrix coefficients, we are able to obtain the exact representations for them. As a result, we achieve error-free calculations up to the final reconstruction step where we can choose an approximate substitution precision based on hardware/accuracy trade-off. A comparison between Daubechies 4 and 6 coefficients is also performed. The last part demonstrates that the new encoding technique offers better performance compared to the classical binary (fixed-point binary) design and it is also very well suited for high-speed VLSI implementation. View full abstract»

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  • A superresolution imaging method based on dense subpixel-accurate motion fields

    Page(s): 35 - 42
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (614 KB) |  | HTML iconHTML  

    A superresolution imaging method suitable for imaging objects moving in a dynamic scene is described. The main operations are performed over three threads: the computation of a dense interframe 2D motion-field induced by the moving objects at subpixel resolution in the first thread. Concurrently, each video image frame is enlarged by cascade of an ideal low-pass filter and a higher rate sampler, essentially stretching each image onto a larger grid. Then, the main task is to synthesize a higher resolution image, from the stretched image of the first frame, and that of the subsequent frames subjected to suitable motion compensation. A simple averaging process and/or a simplified Kalman filter may be used to minimize the spatio-temporal noise, in the aggregation process. The method takes advantage of widely used MPEG-4 encoding hardware/software tools. A few experimental cases are presented with a basic description of the key operations performed in the overall process. View full abstract»

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  • Synthetic and natural hybrid coding for interactive broadcast TV

    Page(s): 43 - 52
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    We describe some aspects of synthetic and natural hybrid coding for future developments in interactive broadcast TV. We show some hardware components in order to provide a basis for discussion. One problem we are dealing with is to reconstruct natural 3D objects as arbitrarily shaped 3D video objects. The intention is to improve scene realism. The computation of 3D video objects offers a variety of possibilities in current computer graphics. Interactivity is one of the most important tasks in the development of 3D-applications since it allows for entering new markets, e.g. interactive TV-broadcast. The MPEG-4 standard offers a variety of possibilities to cover these aspects. View full abstract»

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  • XMT tools for interactive broadcasting contents description

    Page(s): 184 - 191
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    Interactive broadcasting is now considered as a next generation broadcasting service, which covers territorial, mobile and wireless terminals. In interactive broadcasting, viewers not only watch the broadcasting programs but also pass their requirements to program providers. In order to represent this interactivity, it is considered that the MPEG-4 is a well-adopted standard because of its object-based scene description scheme, which is in the binary (BIFS) and textual (XMT) formats. We describe the XMT tools that can generate, manipulate and translate an XML document for the interactive broadcasting content description, and also introduce an authoring system based on the provided XMT tools. Since the XMT is a textual format, content authors can easily exchange contents with other creators, applications and tools. This exchangeability of the XMT enables the authors to create interactive broadcasting contents more efficiently and rapidly. Therefore, our XMT tools become core component modules for developing interactive broadcasting contents. View full abstract»

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  • Multiple description coding using transforms and data fusion

    Page(s): 192 - 199
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (545 KB) |  | HTML iconHTML  

    A new multiple description coding technique is proposed, in which multiple descriptions are generated using different transforms and a linear fusion is employed to reconstruct the central description. This new method exhibits some of the advantages of multiple description vector quantization while having the complexity of multiple description scalar quantization. When this method is applied to fixed level scalar quantization of a memoryless Gaussian signal, the distortion of the central description is about half the distortion of side descriptions if the side descriptions have been designed to have the least distortion achievable at a fixed rate. When applied to image coding, the new technique yields result, which is better than current state-of-the-art MD image coders in terms of description distortions and complexity of implementation. View full abstract»

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  • Design and implementation of streaming system for MPEG-4 based interactive contents over IP networks

    Page(s): 100 - 107
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (627 KB) |  | HTML iconHTML  

    We present an MP4 file streaming system over IP networks. Using the proposed system, the user can access MP4 contents in a server and interact with the selected content via IP networks. The MP4 contents contain the media data, and information of spatio-temporal relationship and behavior of the media data based on MPEG-4. The presented streaming server system consists of GUI, server management layer, sync layer, and delivery layer. The GUI shows the streaming status such as delay, loss and jitter. The server management layer controls creating and closing sessions. The sync layer was designed to generate SL packets, and the delivery layer sends each object of MP4 contents to clients. In addition, we have implemented a client system based on the IM1-2D player developed by AHG of MPEG. The client system can receive and play MP4 contents and send user's message to the server via IP networks. The presented streaming system was designed to use real-time transport protocol (RTP) for media data requiring real-time streaming, RTP control protocol (RTCP) for QoS management and transmission control protocol (TCP) for essential data such as initial object descriptor (IOD), object descriptor (OD), binary format for scene (BIFS), and for loss-sensitive media data such as still images. View full abstract»

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  • Funding opportunities for high-risk research

    Page(s): 4 - 16
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1163 KB)  

    This talk is about, "Accelerating DCV Innovation: The Advanced Technology Program". The Advanced Technology Program (ATP) is one of the nation's leading sources of funding for industry-led high-risk technology development. Many project's supported by ATP have significant potential to impact digital and computational video. This presentation briefly examines the potential impact of ATP research projects on DCV. Projects ranging from data storage to video indexing to compression to 3D model creation are examined. The presentation concludes with an overview of the ATP and encouragement to submit proposals to the ATP. View full abstract»

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  • MPEG-4 extension for augmented stereoscopic video

    Page(s): 176 - 183
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (659 KB) |  | HTML iconHTML  

    We propose the extended MPEG-4 for augmented stereoscopic video. Augmented stereoscopic video is a stereoscopic synthetic video. Natural stereoscopic video and virtual CG object are synthesized. MPEG-4 has a scene graph, BIFS. BIFS is based on VRML. Augmented stereoscopic video is thought of as an off-line AR. Thus, there are some mismatch problems when augmented stereoscopic video is presented in MPEG-4. VR is based on the virtual environment. AR is based on real environment. A user can move view-position in VR. It's not possible in AR. In AR, the registration is a key technology. MPEG-4 does not support that. We introduce registration mechanism to MPEG-4. We also, propose new nodes for stereoscopic and camera information stream. Some nodes are needed for stereoscopic in MPEG-4, because MPEG-4 BIFS can't handle the stereoscopic scene. BackgroundSS and StereoTexture nodes are the new nodes for natural stereoscopic visual object and CameraViewpointSS and CameraInfoSS nodes are the new nodes for natural video camera information. Those are used for registration task in our MPEG-4 extension. View full abstract»

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  • A new time-interleaved architecture for high-speed A/D converters

    Page(s): 93 - 99
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    Time-interleaved ADCs (TIADCs) are among the fastest architectures adopted when speed is the bottleneck of the system. Real-time medical imaging and networked video are few examples of many applications using such fast ADCs. The spurious-free dynamic range (SFDR) is an important parameter of high-speed TIADCs. We propose a new time-interleaved ADC architecture that reduces the spurious components and allow us to obtain better SFDR with reasonable addition of control and delay circuits to the ADC. The proposed architecture is digitally oriented, i.e. does not need complex analog circuitries. Matlab simulations show the effectiveness of the proposed approach in a multichannel ADC with arbitrary bit resolution and sampling rate. For a 12 bit ADC, the SFDR achieved using the proposed randomizing method can be as wide as -78 dBc. View full abstract»

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  • A prototype for parallel motion estimation architecture using full-search block matching algorithm

    Page(s): 129 - 134
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (416 KB) |  | HTML iconHTML  

    We present a new architecture for parallel motion estimation video processing. This architecture is designed to process the data in parallel; therefore, in comparison to the regularly used nonparallel architectures, it is up to 15 times faster. The speed of this architecture is suitable for frames of up to size 640*480 pixels, and its power efficiency makes it a very suitable design for mobile devices that need any kind of video streaming. View full abstract»

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  • Systolic array architectures for full-search block matching motion estimation

    Page(s): 108 - 115
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (548 KB) |  | HTML iconHTML  

    We present various systolic architectures for full search block matching motion estimation. Along with one dimensional (N PE's) and two dimensional (N2 PE's) systolic array architectures using 2N, 3N,... ...., N2-N processing elements are also presented. Each of the architectures is analyzed and then compared with others in terms of power consumption, area, delay and noise. Simulation and analysis results of the architectures are presented. The results show the trade-off between the number of processing elements used, processing rate and power dissipation. View full abstract»

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  • Design and implementation of a 2D convolution core for video applications on FPGAs

    Page(s): 85 - 92
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (734 KB) |  | HTML iconHTML  

    We present the design and implementation of a 2D convolution core for video applications optimised for the Xilinx low cost 3.3V SpartanXL™ FPGA family. The core is parameterised and scaleable in terms of the convolution window size and coefficients, the input pixel word length and the image size. The window coefficients are represented as sum/subtract of power of twos in canonical signed digit (CSD) representation, which means that the usually costly multiplication operation can be easily implemented by a small number of simple shift-and-add operations, leading to considerable hardware savings. Optimised FPGA configurations capable of processing real-time PAL video are automatically generated from high-level descriptions of generic 2D convolutions, in the form of EDIF netlists, in less than 1 sec. View full abstract»

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  • A low power VLSI architecture for multistage interval-based motion estimation (MIME) algorithm

    Page(s): 159 - 166
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (543 KB) |  | HTML iconHTML  

    We present an algorithmic enhancement of the full-search block-matching algorithm for motion estimation. The proposed algorithm reduces the computational load by successively eliminating noncandidate blocks from the search window. The elimination process uses low bit-resolution blocks and it is applied in two stages for motion vector computation. This computational reduction leads to enhanced performance in terms of low power consumption and fast motion vector estimation. A low power VLSI implementation of the algorithm is also presented. Simulation results show that the new algorithm, at an average, eliminates more than 88% of the candidate blocks in the search window. View full abstract»

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  • A general framework for tracking objects in a multi-camera environment

    Page(s): 200 - 204
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    We present a framework for real-time tracking of objects. Our system consists of multiple cameras and a control unit that communicate through a network. Each camera has a general-purpose processor and a reconfigurable hardware unit embedded in it. Therefore, some computation can be performed at the point of data collection. We argue that collocating the computation with the data at vision sensors can improve performance, communication overhead and network scalability. We exploit the parameterization and tuning of the vision algorithms and present a sample tracking application implemented on our framework. We further argue that the proposed architecture can be used to implement many other real-time vision applications through hardware reconfiguration. View full abstract»

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  • Designing an embedded video processing camera using a 16-bit microprocessor for surveillance system

    Page(s): 151 - 158
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (725 KB) |  | HTML iconHTML  

    We describe the design and implementation of a hybrid intelligent surveillance system consisting of an embedded system and a personal computer (PC)-based system. The embedded system performs some of the image processing tasks and sends the processed data to a PC. The PC tracks persons and recognizes two-person interactions by using a grayscale side-view image sequence captured by a stationary camera. Based on our previous research, we explored the optimum division of tasks between the embedded system and the PC, simulated the embedded system using dataflow models in Ptolemy, and prototyped the embedded systems in real-time hardware and software using a 16-bit CISC microprocessor. This embedded system processes one frame image in 89 ms, which is within three frame-cycle periods for a 30 Hz video system. In addition, the real-time embedded system prototype uses 5.7 Kbytes of program memory, 854 Kbytes of internal data memory and 2 Mbytes external DRAM. View full abstract»

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  • Motion estimation with the redundant wavelet transform

    Page(s): 53 - 59
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    We present a fast method for computation of the motion flow based on the redundant Haar transform of reference frames in a video sequence. This algorithm gives a multiscale representation of the motion flow, which allows progressive encoding. The high efficiency of the algorithm is achieved by a multiscale correlation between the current and reference frames of the coefficients on each of the Haar blocks. The algorithm is designed to adapt dynamically to make optimal use of channel capacity. View full abstract»

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  • Design and implementation of concatenated decoder

    Page(s): 135 - 142
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    A concatenated decoder mainly composed of depunctured Viterbi decoder, convolutional deinterleaver, and Reed-Solomon decoder is presented. It has very wide applications in DVB, HDTV and satellite communication systems. In the convolutional interleaver, an over-clocking scheme is employed to guarantee the speed limits. The algorithms of Viterbi decoder and RS decoder are modified T-algorithm and modified Euclidean algorithm, respectively. Furthermore, the finite field multipliers and inversion over composite fields was adapted to optimize area and power in RS decoder, which reduced the area near to 25% compared to the conventional finite fields. The proposed concatenated decoder has about 81,000 gates except RAM model, which are implemented in 100 MHz using 0.25 um CMOS process. View full abstract»

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  • Illumination mipmaps for texture mapping in computational video

    Page(s): 75 - 81
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    In computational video, acquired images are often texture mapped to blend with computer generated polygonal surfaces. The shading of a polygonal surface changes as the light source direction relative to the composite object changes due, for instance, to the object's motion. We propose the use of so-called illumination mipmaps that can adjust the texture mapped image according to the illumination change so that the appearance of the composite object is more cohesive. We test our concept on texture mapped images of human faces. View full abstract»

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  • A novel packet loss recovery for video stream transmission over networks

    Page(s): 205 - 212
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1337 KB) |  | HTML iconHTML  

    Transmitting high-quality, real-time interactive video over lossy networks such as Internet and wireless networks is very challenging, because of limited bandwidth and high packet loss rates. The loss of packets in a video frame leads not only to reduced quality of that frame, but also results in the propagation of that distortion to successive frames. We present a novel error recovery scheme based on a Solomon-like code scheme with only XOR operations for recovering lost packets. The simulation results indicate the advantage of our scheme over other erasure-resilient coding scheme. View full abstract»

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  • A 3D video stream display architecture hybrid MEM/CMOS SIMD-parallel indexed swept-volume 3D displays

    Page(s): 2 - 3
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    We describe the architecture of a three-dimensional image display comprised of a helical surface, which is kept rotating about its axis. The images are projected by means of a high performance digital mirror array, working in a SIMD parallel mode. The optical ray emanating from each mirror would intersect with the rotating surface at a 3D point whose 3D position is determined by the exact time of the emission. Recent advancements in microelectromechanical systems (MEMS), micro opto electromechanical systems (MOEMS) and CMOS fabrication processes offer the potential to fabricate these SIMD steerable high performance mirror arrays with in situ memory. We focus on the architecture of a scalable video stream display, in which the end user consumption may vary from a simple television to a multiview visualization of 3D dynamic events. View full abstract»

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  • Cache performance of video computation workloads

    Page(s): 169 - 175
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    Many video computation workloads execute on general-purpose computers including workstations, desktop systems and personal computers. The microprocessors that form the central processing unit of these systems typically expend a significant part of their real estate for on-chip caches and hence it is important to understand cache behavior of video computation workloads. Caches generally improve application performance by capturing temporal and spatial locality in instruction and data accesses. Modern processors run at speeds in the GHz range, and contain 2 or 3 levels of caches. The access time of main memory units in these systems are in the order of 100 cycles. Unless the caches can result in good hit ratios, the memory access times are prohibitive. We study the cache performance of video workloads. The workloads studied include JPEG, MPEG-2 and H263. The impact of cache sizes, block sizes and associativity on cache performance is discussed. It is observed that caches are used very well by these video computation workloads. View full abstract»

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  • Low power full search block matching motion estimation architecture

    Page(s): 123 - 128
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (466 KB) |  | HTML iconHTML  

    We present an architectural enhancement to reduce the power consumption of one dimensional full-search block-matching (FSBM) motion estimation. The architecture eliminates unnecessary computations and reduces the power consumption without sacrificing the optimality and high throughput. Both the new and old architectures are compared for power consumption in order to clarify the effectiveness. View full abstract»

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