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Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings. The 9th IEEE

Date 27-30 May 2003

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Displaying Results 1 - 25 of 25
  • Practical voltage-scaling for fixed-priority RT-systems

    Publication Year: 2003 , Page(s): 106 - 114
    Cited by:  Papers (47)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (527 KB) |  | HTML iconHTML  

    In CMOS circuits, power consumption is proportional to the product of the frequency and the square of the supply voltage. Hence, any reductions in the operating frequency of the processor and its supply voltage can lead to significant savings in energy consumption (and heat dissipation) but cause longer execution times. The application of dynamic voltage scaling (DVS) techniques to real-time systems must therefore attempt to minimize energy while guaranteeing the schedulability of the real-time tasks. In this paper we study the effect of limited number of operating frequencies on the performance of voltage-scaling algorithms. The optimal frequency grid which minimizes the effect of discrete operating frequencies is also derived We then propose four alternative voltage-scaling schemes, Sys-Clock, PM-Clock, Opt-Clock and DPM-Clock. Each scheme is suitable for different hardware configuration which may have high or low voltage-scaling overhead and different taskset characteristics. We have implemented our voltage-scaling schemes on CMU's real-time OS, Linux/RK, on the 3700 series Compaq iPAQ and a 733MHz XScale BRH board modified to support voltage-scaling. View full abstract»

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  • Global multiprocessor scheduling of aperiodic tasks using time-independent priorities

    Publication Year: 2003 , Page(s): 170 - 180
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (346 KB) |  | HTML iconHTML  

    We provide a constant time schedulability test for a multiprocessor server handling aperiodic tasks. Dhall's effect is avoided by dividing the tasks in two priority classes based on task utilization: heavy and light. We prove that if the load on the multiprocessor server stays below Uthreshold = 3 - √7 = 35.425%, the server can accept incoming aperiodic tasks and guarantee that the deadlines of all accepted tasks will be met. 35.425% utilization is also a threshold for a task to be characterized as heavy. The bound Uthreshold = 3 - √7 = 35.425% is easy-to-use, but not sharp if we know the number of processors in the multiprocessor. For a server with m processors, we calculate a formula for the sharp bound Uthreshold(m), which converges to Uthreshold from above as m - -. The results are based on a utilization function um(x) = 2(1 - x)/(2 + √(2 + 2x)) + x/m. By using this function, the performance of the multiprocessor can in some cases be improved beyond Uthreshold (m) by paying the extra overhead of monitoring the individual utilization of the current tasks. View full abstract»

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  • A model-based approach to system-level dependency and real-time analysis of embedded software

    Publication Year: 2003 , Page(s): 78 - 85
    Cited by:  Papers (15)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (466 KB) |  | HTML iconHTML  

    We describe an end-to-end tool-chain for model-based design and analysis of component-based embedded real-time software. All aspects of an embedded real-time system are captured in domain-specific models, including software components and architecture, timing and resource constraints, processes and threads, execution platforms, etc. We focus on the AIRES tool, which performs various static analysis tasks based on the models, including system-level dependency analysis, execution rate assignment to component ports, real-time and schedulability analysis, and automated allocation of components to processors. By capturing all relevant information explicitly in the models at the design-level, and performing analysis that provide insight into nonfunctional aspects of the system, we can raise the level of abstraction for the designer, and facilitate rapid system prototyping. View full abstract»

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  • Improving scalability of task allocation and scheduling in large distributed real-time systems using shared buffers

    Publication Year: 2003 , Page(s): 181 - 188
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (308 KB) |  | HTML iconHTML  

    Scheduling precedence-constrained tasks in a distributed real-time system is an NP-hard problem. As a result, the task allocation and scheduling algorithms that use these heuristics do not scale when applied to large distributed systems. In this paper we propose a novel approach that eliminates inter-task dependencies using shared buffers between dependent tasks. The system correctness, with respect to data-dependency, is ensured by having each dependent task poll the shared buffers at a fixed rate. Tasks can, therefore, be allocated and scheduled independently of their predecessors. To meet the timing constraints of the original dependent-task system, we have developed a method to iteratively derive the polling rates based on end-to-end deadline constraints. The overheads associated with the shared buffers and the polling mechanism are minimized by clustering tasks according to their communication and timing constraints. Our simulation results with the task allocation based on a simple first-fit bin packing algorithm showed that the proposed approach scales almost linearly with the system size, and clustering tasks greatly reduces the polling overhead. View full abstract»

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  • Synchronous modeling of avionics applications using the SIGNAL language

    Publication Year: 2003 , Page(s): 144 - 151
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (324 KB) |  | HTML iconHTML  

    In this paper, we discuss a synchronous, component-based approach to the modeling of avionics applications. The specification of the components relies on the avionics standard ARINC 653 and the synchronous language SIGNAL is considered as modeling formalism. The POLYCHRONY tool-set allows for a seamless design process based on the SIGNAL model, which provides possibilities of high level specifications, verification and analysis of the specifications at very early stages of the design, and finally automatic code generation through formal transformations of these specifications. This suits the basic stringent requirements that should be met by any design environment for embedded applications in general, and avionics applications in particular. View full abstract»

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  • Collaborative operating system and compiler power management for real-time applications

    Publication Year: 2003 , Page(s): 133 - 141
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (373 KB) |  | HTML iconHTML  

    Managing energy consumption has become vitally important to battery operated portable and embedded systems. A dynamic voltage scaling (DVS) technique reduces the processor's dynamic power consumption quadratically at the expense of linearly decreasing the performance. Reducing energy using DVS in the context of real-time systems should consider this tradeoff. In this paper we introduce a novel collaborative approach between the compiler and the operating system (OS) that uses fine-grained information about the execution times of a real-time application to reduce energy consumption. We use the compiler to annotate an application's source code with path-dependent information called power management hints (PMHs). This information captures the temporal behavior of the application, which varies by executing different paths. During program execution, the OS periodically changes the processor's frequency and voltage based on the temporal information provided by the PMHs. These speed adaptation points are called power management points (PMPs). We evaluate our scheme using two embedded applications: a video decoder and an automatic target recognition application. Our scheme shows an energy reduction of up to 79% over no power management and up to 50% over a static power management scheme. View full abstract»

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  • VEST: an aspect-based composition tool for real-time systems

    Publication Year: 2003 , Page(s): 58 - 69
    Cited by:  Papers (27)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (429 KB) |  | HTML iconHTML  

    Building distributed embedded systems from scratch is not cost-effective. Instead, designing and building these systems by using domain specific components has promise. However, in using components, the most difficult issues are ensuring that hidden dependencies won't cause failures and that non-functional properties such as real-time performance are being met. We have built the VEST toolkit whose aim is to provide a rich set of dependency checks based on the concept of aspects to support distributed embedded system development via components. We describe the toolkit and its novelty. We also use VEST on two case studies of a CORBA-based middleware for avionics. Data collected shows that VEST can significantly reduce the time it takes to build a distributed real-time embedded system by over 50%. Key "lessons learned" from our experience with using VEST on these case studies are also highlighted. View full abstract»

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  • Analysis of the execution time unpredictability caused by dynamic branch prediction

    Publication Year: 2003 , Page(s): 152 - 159
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (328 KB) |  | HTML iconHTML  

    This paper investigates how dynamic branch prediction in a microprocessor affects the predictability of execution time for software running on that processor. By means of experiments on a number of real processors employing various forms of branch prediction, we evaluate the impact of branch predictors on execution time predictability. The results indicate that dynamic branch predictors give a high and hard-to-predict variation in the execution time of even very simple loops, and that the execution time effects of branch mispredictions can be very large relative to the execution time of regular instructions. We have observed some cases where executing more iterations of a loop actually take less time than executing fewer iterations, due to the effect of dynamic branch predictors. We conclude that current dynamic branch predictions schemes are not suitable for use in real-time systems where execution time predictability is desired. View full abstract»

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  • Real-time scheduling of hierarchical reward-based tasks

    Publication Year: 2003 , Page(s): 2 - 9
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (675 KB) |  | HTML iconHTML  

    A reward-based task typically consists of a mandatory part that must be accomplished before the given deadline, and an optional part that is associated with rewards for partial completion. In this paper we consider a hierarchical framework of reward-based tasks. These types of tasks are characterized by positive rewards, tree-like order-dependency and identical service times. We propose a near-optimal scheduling algorithm for such tasks under hard-real time constraints. In our technique, tasks are pre-sorted by their potential rewards and real-time scheduling can be achieved with no prior knowledge of the hard deadlines. We also demonstrate how this approach could be utilized for uninterrupted transfer of multimedia in varying network conditions, while delivering near-best results. View full abstract»

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  • Real-time support for mobile robotics

    Publication Year: 2003 , Page(s): 10 - 18
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    Coordinated behavior of mobile robots is an important emerging application area. Different coordinated behaviors can be achieved by assigning sets of control tasks, or strategies, to robots in a team. These control tasks must be scheduled either locally on the robot or distributed across the team. An application may have many control strategies to dynamically choose from, although some may not be feasible, given limited resource and time availability. Thus, dynamic feasibility checking becomes important as the coordination between robots and the tasks that need to be performed evolves with time. This paper presents an online algorithm for finding a feasible strategy given a functionally equivalent set of strategies for achieving an application's goals. We present two heuristics for feasibility checking. Both consider communication cost and utilization bound to make allocation (of tasks to execution sites) and scheduling decisions. Extensive experimental results show the effectiveness of the approaches, especially in resource-tight environments. We also demonstrate the application of our approach to real-world scenarios involving teams of robots and show how feasibility analysis also allows the prediction of the scalability of the solution to large robot teams. View full abstract»

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  • Feedback control real-time scheduling in ORB middleware

    Publication Year: 2003 , Page(s): 37 - 48
    Cited by:  Papers (15)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (394 KB) |  | HTML iconHTML  

    Existing real-time ORB middleware standards such as RT-CORBA do not adequately address the challenges of 1) providing robust performance guarantees portably across different platforms, and 2) managing unpredictable workload. To overcome this limitation, we have developed software called FCS/nORB that integrates a Feedback Control real-lime Scheduling (FCS) service with the nORB small-footprint real-time ORB designed for networked embedded systems. FCS/nORB features feedback control loops that provide real-time performance guarantees by automatically adjusting the rate of remote method invocations transparently to an application. FCS/nORB thus enables real-time applications to be truly portable in terms of real-time performance as well as functionality, without the need for hand tuning. This paper presents the design, implementation, and evaluation of FCS/nORB. Our extensive experiments on a Linux testbed demonstrate that FCS can provide deadline miss ratio and utilization guarantees in face of changes in the platform and task execution times, while introducing a small amount of overhead. View full abstract»

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  • Kernel support for open QoS-aware computing

    Publication Year: 2003 , Page(s): 96 - 105
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB) |  | HTML iconHTML  

    Most research on QoS-aware computing considers systems where code is generally partitioned into separately schedulable tasks with associated timing constraints. In sharp contrast to such systems is a myriad of mainstream off-the-shelf applications and services such as Web servers, caches, mail servers, and content distribution proxies where QoS guarantees may be needed, yet the software follows a best-effort one-size-serves-all model. In this model, different traffic classes are not mapped to different schedulable entities (tasks), making it impossible to use real-time scheduling meaningfully to satisfy application QoS. This paper presents a kernel-level solution to the problem of retrofitting such best-effort systems with QoS support without changing application code. The solution has been implemented in Linux. By downloading a few kernel patches and configuring the patched kernel appropriately, a system administrator can endow a best-effort service with QoS assurances transparently to the legacy server. An extensible library is provided in a separate QoS manager that allows implementing different types of QoS guarantees within the extended service. The performance of the resulting system is evaluated on the implemented Linux-based prototype. It is shown that QoS-sensitive behavior is successfully achieved. View full abstract»

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  • Modular code generation from hybrid automata based on data dependency

    Publication Year: 2003 , Page(s): 160 - 168
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (435 KB) |  | HTML iconHTML  

    Model-based automatic code generation is a process of converting abstract models into concrete implementations in the form of a program written in a high-level programming language. The process consists of two steps, first translating the primitives of the model into (approximately) equivalent implementations, and then scheduling the implementations of primitives according to the data dependency inherent in the model. When the model is based on hybrid automata that combine continuous dynamics with a finite state machine, the data dependency must be viewed in two aspects: continuous and discrete. Continuous data dependency is present between mathematical equations modeling time-continuous behavior of the system. On the other hand, discrete data dependency is present between guarded transitions that instantaneously change the continuous behavior of the system. While discrete data dependency has been studied in the context of code generation from modeling languages with synchronous semantics (e.g., ESTEREL), there has been no prior work that addresses both kinds of dependency in a single framework. In this paper we propose a code generation framework for hybrid automata which deals with continuous and discrete data dependency. We also propose techniques for generating modular code that retains modularity of the original model. The framework has been implemented based on the hybrid system modeling language CHARON, and experimented with Sony's robot platform AIBO. View full abstract»

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  • A cyclic-executive-based QoS guarantee over USB

    Publication Year: 2003 , Page(s): 88 - 95
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (344 KB) |  | HTML iconHTML  

    Universal Serial Bus (USB) is a popular standard for PC peripheral devices because of its versatile peripheral interconnection specifications. USB not only provides simplified hardware connectors but also supports for various bus traffics, such as isochronous and bulk transfer activities. Although the USB specifications provide a way for users to specify the upper bound on the number of bytes for each data transfer in a 1ms time frame, little work is done to provide QoS guarantees for devices (e.g., the lower bound on the bytes for each device type in a 1ms time frame) and a mechanism in enforcing the guarantees. In this paper we propose a cyclic-executive-based bandwidth reservation and scheduling method to support QoS guarantees over USB, especially for those isochronous bus activities. The proposed bandwidth reservation and scheduling method could reserve USB bandwidth for devices in an on-demand fashion. The capability of the proposed scheme was shown by the implementation and demonstration of a USB-based surveillance system prototype which adopted the proposed scheme. View full abstract»

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  • Feedback control with queueing-theoretic prediction for relative delay guarantees in web servers

    Publication Year: 2003 , Page(s): 208 - 217
    Cited by:  Papers (33)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (516 KB) |  | HTML iconHTML  

    The use of feedback control theory for performance guarantees in QoS-aware systems has gained much attention in recent years. In this paper, we investigate merging, within a single framework, the predictive power of queueing theory with the reactive power of feedback control to produce software systems with a superior ability to achieve QoS specifications in highly unpredictable environments. The approach is applied to the problem of achieving relative delay guarantees in high-performance servers. Experimental evaluation of this approach on an Apache web server shows that the combined schemes perform significantly better in terms of keeping the relative delay on target compared to feedback control or queueing prediction alone. View full abstract»

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  • Probabilistic worst-case response-time analysis for the controller area network

    Publication Year: 2003 , Page(s): 200 - 207
    Cited by:  Papers (16)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (392 KB) |  | HTML iconHTML  

    This paper presents a novel approach for calculating a probabilistic worst-case response-time for messages in the Controller Area Network (CAN). CAN uses a bit-stuffing mechanism to exclude forbidden bit-patterns within a message frame. The added bits eliminate the forbidden patterns but cause an increase in frame length. How much the length is increased depends on the bit-pattern of the original message frame. Traditional response-time analysis methods assume that all frames have a worst-case number of stuff-bits. This introduces pessimism in the analysis. In this paper we introduce an analysis approach based on using probability distributions to model the number of stuff-bits. The new analysis additionally opens tip for making trade-offs between reliability and timeliness, in the sense that the analysis will provide a certain probability for missing deadlines, which in the reliability analysis can be treated as a probability of failure. We evaluate the performance of our method using a subset of the SAE1 benchmark. View full abstract»

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  • Template-based real-time dwell scheduling with energy constraint

    Publication Year: 2003 , Page(s): 19 - 27
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (390 KB) |  | HTML iconHTML  

    This paper addresses the scheduling problem of radar dwells in multi-function phase array radars. Well-known and new challenges make it difficult to provide predictable performance for real-time dwell scheduling. We developed the template-based scheduling algorithm to guarantee the performance requirement with low on-line overhead. Simulation results show that the template-based scheduling approach increases utilization and provides predictable performance. View full abstract»

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  • Tool set implementation for scenario-based multithreading of UML-RT models and experimental validation

    Publication Year: 2003 , Page(s): 70 - 77
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (299 KB) |  | HTML iconHTML  

    This paper presents our tool set implementation for scenario-based multithreading of object-oriented real-time models and an accompanying experimental validation. Our tools enable the automated, schedulability-aware implementation of real-time object-oriented models, exploiting an existing CASE tool. Our implementation is facilitated by (1) our customized runtime system modified to support scenario-based thread execution, (2) a design model template that centralizes the arrival of external inputs, (3) a model analyzer tool, and (4) a model-specific code modifier tool. Our tools simplify design by removing thread-related design concerns from the modeling process, separating design and implementation. We performed validation by conducting experiments that clearly demonstrate the performance improvements that can be gained through our scenario-based implementation: response time improvements for high priority tasks of as much as 70% and a 5-fold decrease in blocking or the elimination of blocking for some tasks. View full abstract»

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  • Evaluation of application-aware heterogeneous embedded systems for performance and energy consumption

    Publication Year: 2003 , Page(s): 124 - 132
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (313 KB) |  | HTML iconHTML  

    In this work, we first present an application-initiated strategy that aims to control the energy consumption, while simultaneously enhancing the performance of a heterogeneous embedded system. We assess the benefits of using this strategy by means of a traditional evaluation framework. Even though the overall benefits and improvements are apparent, the performance-energy tradeoffs are not prominently noticeable when the traditional framework is used during evaluation. Hence, we propose a framework based on a new metric called energy-resource efficiency (ERE). ERE defines a link between the performance and energy variations in a system. This metric also serves as a guide to determine the amount of resources needed to attain the desired performance and energy behavior. Our experimental results clearly indicate that a heterogeneous system running an application-aware strategy, when correctly calibrated using ERE, leads to great performance and energy gains. View full abstract»

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  • A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform

    Publication Year: 2003 , Page(s): 189 - 198
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (368 KB) |  | HTML iconHTML  

    The new generation of embedded systems for automotive applications can take advantage of low-cost multiprocessor system-on a chip architectures. The real-time software applications running on these systems require realtime processor scheduling, and also require the management of the communication and synchronization of tasks executing on different processors with limited blocking time. Conventional real-time technologies, like the Rate Monotonic scheduling algorithm together with the Multiprocessor Priority Ceiling Protocol (MPCP) can be used to this purpose. In earlier work, we proposed the Multiprocessor Stack Resource Policy (MSRP) for scheduling tasks and sharing resources in multiprocessor on a chip architectures. In this paper we present an experimental evaluation that compares the performance of our algorithm with a solution based on Rate Monotonic and MPCP in the con text of the Janus multiple processor architecture. The evaluation of the algorithm has been triggered by our ongoing research in the automotive domain. We report on two sets of experiments: the first addresses a range of generic task configurations to see if one of the algorithms can clearly outperform the other The results show MSRP to be better for random task periods but are probably not conclusive. Later we focus on a more application-specific (also more restrictive) architecture design representing a typical automotive application: a power-train controller In this case, MSRP clearly performs better The performance gap between the two policies can be further increased when considering that MSRP is much simpler to implement, it has a lower overhead, and it allows RAM memory optimization. View full abstract»

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  • Evaluating real-time Java for mission-critical large-scale embedded systems

    Publication Year: 2003 , Page(s): 30 - 36
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (353 KB) |  | HTML iconHTML  

    Many of the benefits of Java, including its portability, networking support, and simplicity, are of increasing importance to large-scale distributed realtime embedded (DRE) systems, but have been unavailable due to the lack of acceptable real-lime performance. Recent work establishing the Real-Time Specification for Java (RTSJ) [1] has led to the emergence of Real-Time Java Virtual Machines (RT JVMs) that promise to bridge this gap. This paper describes benchmarking results on an RT JVM. This paper extends previously published results [2] by including additional tests, by being run on a recently available pre-release version of the first commercially supported RTSJ implementation, and by assessing results based on our experience with avionics systems in other languages. View full abstract»

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  • Towards predictable real-time Java object request brokers

    Publication Year: 2003 , Page(s): 49 - 56
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (367 KB) |  | HTML iconHTML  

    Distributed real-time and embedded (DRE) applications often possess stringent quality of service (QoS) requirements. Designing middleware for DRE applications poses several challenges to object request broker (ORB) developers. This paper provides the following contributions to the study of middleware for DRE applications. First, we outline the challenges present in one of the principal ORB components - the portable object adapter (POA) focusing on predictable and scalable demultiplexing. Second, we describe how these challenges are addressed in ZEN, which is an implementation of Real-time CORBA that runs atop jRate, an ahead-of-time compiler that implements most of the Real-Time Specification for Java (RTSJ). Third, we qualitatively and quantitatively compare ZEN's demultiplexing strategies with those of other popular Java ORBs, including JacORB, Sun JDK ORB, and ORBacus. Our results show that ZEN and jRate incorporate the strategies necessary to enable predictability using standards-based middleware and also provide a baseline for what can be achieved by combining Real-time CORBA and RTSJ. View full abstract»

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  • An integrated approach for applying dynamic voltage scaling to hard real-time systems

    Publication Year: 2003 , Page(s): 116 - 123
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (335 KB) |  | HTML iconHTML  

    Wireless and portable devices depend on the limited power supplied by the battery. Dynamic Voltage Scaling (DVS) is an effective method to reduce CPU power consumption. For real-time systems, DVS algorithms must not only provide enough CPU cycles, but also guarantee that no job misses its deadline. In this paper we propose an integrated approach for applying DVS to real-time systems. We define two functions, the available cycle function (ACF) and the required cycle function (RCF), to capture the CPU workload of the real-time tasks. We then formulate the DVS scheduling problem for real-time systems as a nonlinear optimization problem and propose an optimal off-line algorithm to solve this problem. We also propose a novel online algorithm with time complexity O(1) to further reduce power consumption when a job uses fewer execution cycles than the worst-case budget. The algorithms in this paper are based solely on ACF and RCF, and may be applied to different scheduling policies. We illustrate the generality of our approach over previous research by applying our method to EDF and RM scheduling policies and deriving the optimal off-line DVS algorithms for them. Our simulation results show significant improvement over previous work. View full abstract»

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  • Proceedings the 9th IEEE Real-Time and Embedded Technology and Applications Symposium

    Publication Year: 2003
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    Freely Available from IEEE
  • Author index

    Publication Year: 2003 , Page(s): 219
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    Freely Available from IEEE