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Solid-State Circuits Conference. Digest of Technical Papers. 1971 IEEE International

Date 17-19 Feb. 1971

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Displaying Results 1 - 25 of 114
  • [Front cover]

    Publication Year: 1971 , Page(s): f1
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  • Foreword ISSCC 71 - Catalyst for progress

    Publication Year: 1971 , Page(s): 3
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  • Table of contents

    Publication Year: 1971 , Page(s): 4 - 6
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  • Session 1 overview memory 1/ semiconductor memory circuits [breaker page]

    Publication Year: 1971 , Page(s): 9
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  • Two-terminal transistor memory cell using breakdown

    Publication Year: 1971 , Page(s): 10 - 11
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    A transient charge storage memory cell utilizing a two-terminal transistor structure and junction breakdown will be described, illustrated by a simple fabrication scheme that avoids breakdown degradation. Experimental measurements on such cells will be offered. View full abstract»

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  • A high-performance N-channel MOS-LSI using depletion-type load elements

    Publication Year: 1971 , Page(s): 12 - 13
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    The application of depletion type MOS-FETs to monolithic MOS-LSI with reduced power delay will be covered, noting that a 2048-bit read-only memory with 300-ns access time and 50 μW/bit power dissipation has been achieved. View full abstract»

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  • A switched collector impedance memory

    Publication Year: 1971 , Page(s): 14 - 15
    Cited by:  Papers (1)
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    This paper will discuss a 288-bit LSI in which integrated bipolar memory cells exhibited 4-ns access time at 50-200 μW/bit cell standby dissipation. View full abstract»

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  • A trim memory employing both NPN and high-gain unijunction transistors

    Publication Year: 1971 , Page(s): 16 - 17
    Cited by:  Papers (2)
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    A three photo-mask flip-flop memory cell showing a cycle time of 500 ns will be described. Each cell contains four devices in an active area of 35 sq mil and uses 40 μW/bit holding power. View full abstract»

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  • Small-size, low-power bipolar memory cell

    Publication Year: 1971 , Page(s): 18 - 19
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    The development of a bipolar transistor storage cell, consisting of active components, which allows a very high storage density in random access read/write monolithic memories at an extremely low power dissipation, will be covered. View full abstract»

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  • Session 2 overview microwave sources [breaker page]

    Publication Year: 1971 , Page(s): 21
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  • The use of IMPATT generated power for parametric amplifier pumps

    Publication Year: 1971 , Page(s): 22 - 23
    Cited by:  Papers (3)
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    The performance of IMPATT oscillators and amplifiers for parametric amplifier pumps will be analyzed, citing noise, automatic power leveling, and power output. Experimental results at 35 GHz and 42 GHz will be discussed. View full abstract»

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  • A 3.0-6.5 GHz YIG-tuned transistor oscillator/amplifier

    Publication Year: 1971 , Page(s): 24 - 25
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    The availability of new microwave transistors with an fma, in excess of 11 GHz makes it feasible to design oscillator/amplifiers in the C-Band. region. The accurate highfrequency characterization of those transistors by their scattering matrix and the use of optimization methods account for best performance. High-Q single crystal ferrimagnetic garnets provide linear tuning and broadband coverage. Finally, hybrid thin-film techniques on high dielectric sapphire substrate keep the parasitic at a minimum and account for an optimum blend of the various elements. View full abstract»

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  • Thin-film injection-locked oscillators as amplifying stages in 2-GHz radio repeaters

    Publication Year: 1971 , Page(s): 26 - 27
    Cited by:  Papers (1)  |  Patents (1)
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    The use of injection locked oscillators as amplifiers in a radio relay repeater will be described, citing design techniques to obtain broad-locking bandwidth with prefixed oscillation frequencies. View full abstract»

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  • An upper sideband upconverter using MIS-varactors

    Publication Year: 1971 , Page(s): 28 - 29
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    A comparison of the behavior of a metal-insulator semiconductor-varactor in an USBUC to a junction varactor will be presented. The MIS-varactor has been found to be superior in optimizing RF efficiency, stability, bandwidth and suppression of unwanted harmonics. View full abstract»

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  • Formal opening of conference

    Publication Year: 1971 , Page(s): 31 - 32
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  • Impact of solid-state circuitry technology on biomedical electronics

    Publication Year: 1971 , Page(s): 33
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    Solid-state circuitry and transducer advancements have had a broadening influence on the value of electronics for biomedical data processing, implanted circuits and prosthesis. An assessment of the growing family of useful circuit developments that are contributing to expanding applications in or on people will be offered. View full abstract»

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  • Session 4 overview computer-aided design I/modeling [breaker page]

    Publication Year: 1971 , Page(s): 35
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  • Modeling a microwave power transistor

    Publication Year: 1971 , Page(s): 36 - 37
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    Computer simulation of a 2-GHz, 1-W overlay transistor under realistic conditions has disclosed that simple models provide good results when impedances and package parasitics are properly characterized. Predicted and measured performance will be compared. View full abstract»

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  • A simple CAD technique to develop a high-frequency transistor

    Publication Year: 1971 , Page(s): 38 - 39
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    Diffusion profiles for microwave transistors can be varied by computer optimization. This paper will discuss a design optimized for high f_{\max } using 1.5 μ emitters. Calculated f_{\max } of 18 GHz was found to agree with theory. View full abstract»

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  • An accurate short-channel IGFET model for computer-aided circuit design

    Publication Year: 1971 , Page(s): 40 - 41
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    An improved model for short channel IGFETs representing inherent two-dimensional effects will be described. It features accuracy in both triode and saturation response, yet is simple enough for CAD applications. View full abstract»

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  • Automated bipolar junction transistor model parameter determination

    Publication Year: 1971 , Page(s): 42 - 43
    Cited by:  Papers (1)
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    Transistor model parameters can be obtained most accurately by direct examination of device geometry and material properties. However, it is more desirable to determine these parameters through known terminal voltage and current conditions. This paper will describe a method by which parameter determination can be accomplished for a model shown to characterize the transistor more closely than previously known models. View full abstract»

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  • Assessing model adequacy in integrated-curcuit simulation

    Publication Year: 1971 , Page(s): 44 - 45
    Cited by:  Papers (2)
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    A method for assessing the adequacy of transistor models in integrated-circuit simulation programs will be offered. For each transistor in a circuit the method yields the model of least complexity consistent with required accuracy. View full abstract»

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  • Session 5 overview digital-to-analog techniques [breaker page]

    Publication Year: 1971 , Page(s): 47
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  • A variable pulsewidth D/A

    Publication Year: 1971 , Page(s): 48 - 49
    Cited by:  Papers (1)
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    This paper will describe a D/A conversion technique, whereby a parallel digital input is changed into a variable duty ratio pulse to provide an average dc level output. View full abstract»

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  • A complete monolithic 6-bit D/A converter

    Publication Year: 1971 , Page(s): 50 - 51
    Cited by:  Papers (5)
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    Design techniques for realizing a high-performance monolithic D/A voltage converter will be discussed, citing fabrication of a 6-bit converter with an internal voltage reference, current sources, current steering logic, R-2R ladder, and a high-speed op-amp. View full abstract»

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