2017 30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID)

7-11 Jan. 2017

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  • [Front cover]

    Publication Year: 2017, Page(s): c1
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  • [Title page i]

    Publication Year: 2017, Page(s): i
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  • [Title page iii]

    Publication Year: 2017, Page(s): iii
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  • [Copyright notice]

    Publication Year: 2017, Page(s): iv
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  • Table of contents

    Publication Year: 2017, Page(s):v - xiii
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  • Message from the Steering Committee Chair

    Publication Year: 2017, Page(s): xiv
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  • Message from the General Chair

    Publication Year: 2017, Page(s): xv
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  • Message from the Technical Program Chairs

    Publication Year: 2017, Page(s): xvi
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  • Message from the Organizing Chair

    Publication Year: 2017, Page(s): xvii
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  • Message from the President, VLSI Society of India

    Publication Year: 2017, Page(s): xviii
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  • Message from Student Conference Chair

    Publication Year: 2017, Page(s): xix
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  • About the Cover from the Publication Chairs

    Publication Year: 2017, Page(s): xx
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  • VLSI Design 2016 Conference Steering Committee

    Publication Year: 2017, Page(s): xxi
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  • VLSI Design 2017 Conference Committee

    Publication Year: 2017, Page(s):xxii - xxv
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  • Advisory Committee

    Publication Year: 2017, Page(s): xxvi
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  • Technical Program Committee

    Publication Year: 2017, Page(s):xxvii - xxix
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  • Reviewers

    Publication Year: 2017, Page(s):xxx - xxxi
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  • VLSI Design Conference History

    Publication Year: 2017, Page(s): xxxii
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  • Embedded Systems Design Conference History

    Publication Year: 2017, Page(s): xxxiii
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  • Tutorial T1: 22fdx FDSOI Application towards IOT for Smart Devices

    Publication Year: 2017, Page(s): xxxiv
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    Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. 22FDSOI Technology is a Differentiating Technology in advanced CMOS process where FinFET like performance can be achieved while the overall architecture offers 28nm like simplicity in design technique and cost structure. The power, performance and area (PPA) ... View full abstract»

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  • Tutorial T2: Memory is everywhere

    Publication Year: 2017, Page(s): xxxv
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    Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Memory can be found in all aspects of the semiconductor world. This tutorial will review the volatile memories found in today's computers and networking equipment, including DRAM, SRAM and TCAM. For each of these memories we will cover bit cell structure, arr... View full abstract»

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  • Tutorial T3: Thermal Aware Testing of VLSI Circuits and Systems

    Publication Year: 2017, Page(s): xxxvi
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    Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Demand for improved system performance from silicon integrated circuits has caused a significant increase in device density. This, associated with incorporation of power-hungry modules into the system, has resulted in the power consumption of ICs going up by ... View full abstract»

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  • Tutorial T4: Evolved Supply Set Based UPF Methodology

    Publication Year: 2017, Page(s): xxxvii
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    Summary form only given. The Unified Power Format (UPF) defines the power intent & specifications of low power designs and it provides designers with efficient methodology for low power design flow. It is supported by most of the EDA tools in the implementation flow. At the same time the UPF itself is getting evolved in terms of becoming more efficient to address gaps & challenges faced in the imp... View full abstract»

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  • Tutorial T5: The World beyond DRC: Design for Manufacturing (DFM) - Impact on Yield & Reliability for Advanced Technology Nodes and Their Elucidations

    Publication Year: 2017, Page(s): xxxviii
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    Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. As we pace towards advanced technologies there is an assorted increase in design intricacies and accurate layout requirements. To meet the demanding specifications without compromising the time to market, designers look for precise first-pass silicon with fir... View full abstract»

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  • Tutorial T6: High Level Modeling of Digital Circuits

    Publication Year: 2017, Page(s): xxxix
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    A description of this tutorial was not made available for publication as part of the conference proceedings. View full abstract»

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